On Wed, 27 May 2026 14:15:19 +0200, Ahmad Fatoum wrote:
> The current location used to place the very early PBL malloc area on
> Rockchip overlaps the OP-TEE region. This series changes ARM64 to
> make the start of the barebox proper malloc area easier to calculate and
> uses that also for the PBL memory region.
>
> v1:
> https://lore.barebox.org/barebox/[email protected]/
>
> [...]
Applied, thanks!
[1/5] arch: introduce new CONFIG_ARCH_HAS_MALLOC_SIZE
https://git.pengutronix.de/cgit/barebox/commit/?id=660163f709e3 (link may
not be stable)
[2/5] arch: introduce CONFIG_BAREBOX_MEMORY_OFFSET
https://git.pengutronix.de/cgit/barebox/commit/?id=2f63ce43a399 (link may
not be stable)
[3/5] ARM64: switch to CONFIG_BAREBOX_MEMORY_OFFSET
https://git.pengutronix.de/cgit/barebox/commit/?id=a4e8173a985e (link may
not be stable)
[4/5] ARM64: configs: drop CONFIG_MALLOC_SIZE=0x0 as it's now the default
https://git.pengutronix.de/cgit/barebox/commit/?id=f2a6431a7a38 (link may
not be stable)
[5/5] ARM64: place PBL malloc area at start of barebox proper malloc area
https://git.pengutronix.de/cgit/barebox/commit/?id=81fbe2e8d0d4 (link may
not be stable)
Best regards,
--
Sascha Hauer <[email protected]>
