On Wed, 03 Jun 2026 15:33:41 +0200, Stefan Kerkmann wrote:
> This series adds snvs peripheral initialization for the i.MX6UL soc
> which is necessary to write values into the snvs lpgpr register.
>
> To make the code more consistent across the i.MX6/7/8M families some
> smaller cleanups are included as well.
>
>
> [...]
Applied, thanks!
[1/4] nvmem: snvs_lpgpr: remove unnecessary cfg->name assignment
https://git.pengutronix.de/cgit/barebox/commit/?id=d37ceab82e82 (link may
not be stable)
[2/4] ARM: i.MX8M/i.MX7: initialize SNVS glitch detection for all families
https://git.pengutronix.de/cgit/barebox/commit/?id=f0eaecb91875 (link may
not be stable)
[3/4] ARM: i.MX7: snvs: rename imx7_snvs_init -> imx7_setup_snvs
https://git.pengutronix.de/cgit/barebox/commit/?id=536ed336c59f (link may
not be stable)
[4/4] ARM: i.MX6UL: initialize SNVS
https://git.pengutronix.de/cgit/barebox/commit/?id=7c4ecef454dd (link may
not be stable)
Best regards,
--
Sascha Hauer <[email protected]>
