The PBL has always gotten no-op dma_map_single()/dma_sync_single_for_*()/
dma_unmap_single() stubs, on the assumption that DMA buffers live in
uncached memory because the MMU is only turned on in barebox_arm_entry().
That assumption breaks the moment a PBL DMA user runs with the MMU (and
thus the D-cache) on -- which is the direction the i.MX8M PBL is moving in
for a fast, warm-cache next-stage load.
Add an opt-in CONFIG_PBL_HAS_DMA that routes the PBL through the same real
dma_map/dma_sync implementation (drivers/dma/map.c) and arch cache
maintenance (arch_sync_dma_for_*) that barebox proper uses, rather than the
stubs. It is a plain selectable bool: boards/drivers that do PBL DMA with
the MMU on select it; everyone else is byte-for-byte unchanged and keeps
the stubs.
On ARM this also builds dma_$(S64_32).o (arch_sync_dma_for_device) for the
PBL; arch_sync_dma_for_cpu and the dma_{inv,flush}_range cache ops already
come in via the PBL-linked mmu-common.o / mmu_$(S64_32).o.
No functional change unless PBL_HAS_DMA is selected.
Assisted-by: Claude Opus 4.8 (1M context)
Signed-off-by: Johannes Schneider <[email protected]>
---
Notes:
v2:
- New patch. Adds the dma_map/dma_sync cache-maintenance infrastructure
the PBL was missing, behind an opt-in CONFIG_PBL_HAS_DMA (Sascha).
arch/arm/cpu/Makefile | 1 +
common/Kconfig | 12 ++++++++++++
drivers/dma/Makefile | 1 +
include/dma.h | 7 ++++---
4 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
index 467ef17bfd..d1e94d9a13 100644
--- a/arch/arm/cpu/Makefile
+++ b/arch/arm/cpu/Makefile
@@ -7,6 +7,7 @@ pbl-$(CONFIG_ARM_EXCEPTIONS_PBL) += exceptions_$(S64_32).o
interrupts_$(S64_32).
obj-pbl-$(CONFIG_MMU) += mmu-common.o
obj-pbl-$(CONFIG_MMU) += mmu_$(S64_32).o
obj-$(CONFIG_MMU) += dma_$(S64_32).o
+pbl-$(CONFIG_PBL_HAS_DMA) += dma_$(S64_32).o
obj-pbl-y += lowlevel_$(S64_32).o
obj-pbl-$(CONFIG_CPU_32v7) += hyp.o
AFLAGS_hyp.o :=-Wa,-march=armv7-a -Wa,-mcpu=all
diff --git a/common/Kconfig b/common/Kconfig
index 2c75844be9..055f169431 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -87,6 +87,18 @@ config HAS_DMA
Drivers that depend on a DMA implementation can depend on this
config, so that you don't get a compilation error.
+config PBL_HAS_DMA
+ bool
+ depends on HAS_DMA && MMU
+ help
+ Make the streaming DMA API -- dma_map_single(),
+ dma_sync_single_for_cpu()/_for_device() and dma_unmap_single() --
+ available in the PBL, backed by the same arch_sync_dma_for_*() cache
+ maintenance barebox proper uses. Without this the PBL only gets no-op
+ stubs that assume DMA buffers live in uncached memory, which is only
+ true while the MMU (and thus the D-cache) is off. A PBL DMA user that
+ runs with the MMU on must select this so its transfers stay coherent.
+
config GENERIC_GPIO
bool
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 66f9dc2756..c941b69c89 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_DMADEVICES) += dma-devices.o
obj-$(CONFIG_HAS_DMA) += map.o
+pbl-$(CONFIG_PBL_HAS_DMA) += map.o
obj-$(CONFIG_DMA_API_DEBUG) += debug.o
obj-$(CONFIG_MXS_APBH_DMA) += apbh_dma.o
obj-$(CONFIG_OF_DMA_COHERENCY) += of_fixups.o
diff --git a/include/dma.h b/include/dma.h
index 60937a69aa..2a6f3d804a 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -102,7 +102,7 @@ void arch_sync_dma_for_device(void *vaddr, size_t size,
enum dma_data_direction dir);
#endif
-#if IN_PROPER
+#if IN_PROPER || IS_ENABLED(CONFIG_PBL_HAS_DMA)
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t address,
size_t size, enum dma_data_direction dir);
@@ -116,8 +116,9 @@ void dma_unmap_single(struct device *dev, dma_addr_t
dma_addr,
size_t size, enum dma_data_direction dir);
#else
/*
- * assumes buffers are in coherent/uncached memory, e.g. because
- * MMU is only enabled in barebox_arm_entry which hasn't run yet.
+ * PBL without CONFIG_PBL_HAS_DMA: assumes buffers are in coherent/uncached
+ * memory, e.g. because the MMU is only enabled in barebox_arm_entry which
+ * hasn't run yet. Select PBL_HAS_DMA to get real cache maintenance instead.
*/
static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t
address,
size_t size, enum dma_data_direction
dir)
--
2.43.0
