On Rockchip boards the ROM loads the barebox binary to the start of DRAM where later the TF-A is placed, so the first thing all 64bit Rockchip boards do is to move away from that location. This is done with MMU disabled, so takes some time. Instead of letting each board repeat this pattern, do the move in atf.c at a place common for all Rockchip boards and turn on the MMU beforehand.
Also, both TF-A and OP-TEE hold the device tree passed to them in uncached memory, so accessing it is slow. calling fdt_pack() on the device tree before passing it squeezes the unused bytes out of the device tree and thus speed up TF-A and OP-TEE by a few 100ms. Signed-off-by: Sascha Hauer <[email protected]> --- Sascha Hauer (3): ARM: rockchip: move to the load address with the MMU enabled ARM: rockchip: boards: leave moving to the load address to atf.c ARM: rockchip: pack the device tree passed to TF-A and OP-TEE arch/arm/boards/pine64-pinetab2/lowlevel.c | 10 +---- arch/arm/boards/pine64-quartz64/lowlevel.c | 5 +-- arch/arm/boards/protonic-prtpuk/lowlevel.c | 5 +-- arch/arm/boards/protonic-rk356x/lowlevel.c | 5 +-- arch/arm/boards/qnap-tsx33/lowlevel.c | 18 +-------- arch/arm/boards/radxa-cm3/lowlevel.c | 5 +-- arch/arm/boards/radxa-rock3/lowlevel.c | 5 +-- arch/arm/boards/radxa-rock5/lowlevel.c | 10 +---- arch/arm/boards/rockchip-rk3562-evb2/lowlevel.c | 5 +-- .../boards/rockchip-rk3562-kickpi-k3/lowlevel.c | 5 +-- .../boards/rockchip-rk3568-bpi-r2pro/lowlevel.c | 5 +-- arch/arm/boards/rockchip-rk3568-evb/lowlevel.c | 5 +-- arch/arm/boards/wolfvision-pf5/lowlevel.c | 9 +---- arch/arm/boards/xunlong-orangepi-5-plus/lowlevel.c | 5 +-- arch/arm/mach-rockchip/atf.c | 47 +++++++++++++++++++--- 15 files changed, 58 insertions(+), 86 deletions(-) --- base-commit: 4aa5dcd400d5b9cecfd24e68c6f05cd128c75c43 change-id: 20261001-rockchip-early-boottime-b981093bde02 Best regards, -- Sascha Hauer <[email protected]>
