On Wed, 07 Oct 2026 16:57:14 +0200, Michael Tretter wrote:
> The Arrow AXE5 Eagle board has some custom code for toggling the reset
> of the Ethernet phy, because barebox is built without GPIOLIB for binary
> size reasons. These limits are not clearly defined, not reliably
> reproducible and not enforced.
>
> With xloading of the SSBL, the GPIOLIB doesn't have an effect on the
> FSBL size anymore. Otherwise, disabling a few drivers is probably more
> significant than disabling the GPIOLIB.
>
> [...]
Applied, thanks!
[1/2] arm: socfpga: agilex5: select GPIOLIB
https://git.pengutronix.de/cgit/barebox/commit/?id=1a54fc95c9e3 (link may
not be stable)
[2/2] arm: socfpga: axe5-eagle: drop hard-coded PHY reset in board code
https://git.pengutronix.de/cgit/barebox/commit/?id=5f3dad1c142b (link may
not be stable)
Best regards,
--
Sascha Hauer <[email protected]>
