The DMA soft reset completes only once the PHY supplies the RX clock,
which doesn't necessarily happen within 10 ms and indeed takes longer
on a Libre Computer Alta if eth_open_all() opens the interface right
after boot.
Let's wait 200 ms like Linux's dwmac_dma_reset() does since commit
56311a315da7 ("net: stmmac: dwmac_lib: enlarge dma reset timeout").
Also propagate the error through dwmac_ether_init(): so far, a possible
timeout while polling the bit was not propagated up to the probe.
Fixes: f0ae0c33f52c ("net: designware: Don't hang in reset with powered down
phy")
Signed-off-by: Ahmad Fatoum <[email protected]>
---
drivers/net/designware.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index de7d3dcf1090..09d11b1d02a3 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -92,7 +92,7 @@ static int mac_reset(struct eth_device *dev)
start = get_time_ns();
while (readl(&dma_p->busmode) & DMAMAC_SRST) {
- if (is_timeout(start, 10 * MSECOND)) {
+ if (is_timeout(start, 200 * MSECOND)) {
dev_err(&priv->netdev.dev, "MAC reset timeout\n");
return -EIO;
}
@@ -262,7 +262,9 @@ static int dwc_ether_open(struct eth_device *dev)
if (ret)
return ret;
- dwc_ether_init(dev);
+ ret = dwc_ether_init(dev);
+ if (ret)
+ return ret;
descs_init(dev);
--
2.47.3
