On 02/26/2010 07:41 PM, Gábor Stefanik wrote:
> Someone should test the following:
> -Open drivers/ssb/driver_chipcommon_pmu.c
> -In ssb_pmu_init, replace 0x4325 with 0x4312. (This is not the correct
> way to fix this, but should be enough for a test. The correct fix
> would be special-casing for both 4312 and 4325, at least according to
> the MMIO trace produced using wl. Or maybe the if-branch is the
> wrong-way around - only Larry can tell.)

The latest Broadcom driver has changed this section. The new specs should be:

 1. If the pmu revision is 1
   a. Clear bit 0x200 in the PMU control register
 1. Otherwise
   a. Set bit 0x200 in the PMU control register

> BTW does anyone know of a way to trace pci_read/write_config_dword
> calls? Mmiotrace doesn't capture these.

The attached patch will log PCI config reads/writes to the system logs.

Larry

Index: wireless-testing/drivers/pci/access.c
===================================================================
--- wireless-testing.orig/drivers/pci/access.c
+++ wireless-testing/drivers/pci/access.c
@@ -24,6 +24,8 @@ static DEFINE_SPINLOCK(pci_lock);
 #define PCI_word_BAD (pos & 1)
 #define PCI_dword_BAD (pos & 3)
 
+static void pci_bus_log_buf(char *buf);
+
 #define PCI_OP_READ(size,type,len) \
 int pci_bus_read_config_##size \
        (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
@@ -31,11 +33,14 @@ int pci_bus_read_config_##size \
        int res;                                                        \
        unsigned long flags;                                            \
        u32 data = 0;                                                   \
+       char buf[80];                                                   \
        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
        spin_lock_irqsave(&pci_lock, flags);                            \
        res = bus->ops->read(bus, devfn, pos, len, &data);              \
        *value = (type)data;                                            \
        spin_unlock_irqrestore(&pci_lock, flags);                       \
+       sprintf(buf, "Read 0x%X from pos 0x%X\n", data, pos);           \
+       pci_bus_log_buf(buf);                                           \
        return res;                                                     \
 }
 
@@ -45,10 +50,13 @@ int pci_bus_write_config_##size \
 {                                                                      \
        int res;                                                        \
        unsigned long flags;                                            \
+       char buf[80];                                                   \
        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
        spin_lock_irqsave(&pci_lock, flags);                            \
        res = bus->ops->write(bus, devfn, pos, len, value);             \
        spin_unlock_irqrestore(&pci_lock, flags);                       \
+       sprintf(buf, "Wrote 0x%X to pos 0x%X\n", value, pos);           \
+       pci_bus_log_buf(buf);                                           \
        return res;                                                     \
 }
 
@@ -427,3 +435,8 @@ void pci_unblock_user_cfg_access(struct
        spin_unlock_irqrestore(&pci_lock, flags);
 }
 EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);
+
+static void pci_bus_log_buf(char *buf)
+{
+       printk(KERN_DEBUG "%s", buf);
+}
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