Charles great answer Lenny - rule of thumb is if you have to go outside of the PRU, it will be both slow and non-deterministic because you have to go over the l3 interconnect. Because of this if you need tight timing behavior you should not make any outside-of-pru memory accesses. I got around this by having PRU0 doing the "realtime" stuff and putting data in PRU memory and then having PRU1 stream that to DDR.
I briefly looked at DMA but could not spend the time to figure out how to initiate DMA transfers from the PRU. If anyone figures that out a post on it would be fantastic. -c On Sunday, January 5, 2014 5:00:45 PM UTC-5, Charles Steinkuehler wrote: > > On 1/5/2014 3:50 PM, Lenny wrote: > > Thanks a lot. These delays are quite disappointing. Is it possible to > > shorten these delays by using e.g. DMA to transfer data from a > peripheral > > (in my case the TSC_ADC) directly to PRU memory? > > It should be possible to DMA into the PRU data memory, and indeed > checking section 10 of the TRM (Interconnects) shows that all TPTC > (Third Party Transfer Controller, a.k.a DMA) initiators connect to the > L4_Fast slave where the PRU-ICSS lives. > > -- > Charles Steinkuehler > [email protected] <javascript:> > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/groups/opt_out.
