On 1/29/2014 9:27 AM, Michael wrote:
> 
> Hi Charles,
> 
> I only had a quick look on your work, but there seems to be a mixup in the 
> addresses and also the pin usage values:

Thanks for the help!

> For example pin "/* P9_24 (ZCZ ball D15) */" in line 419 should have the 
> address 0x184 and not 0x084, 

Yep, good catch!  I'll double-check all the addresses.  There was a lot
of cut-and-paste and manual typing, so I'm sure there are more goofs to
be found.

> and also the "P9_26_can_pin" (in line 447) as 
> transmitter should have the bit 5 (RX) disabled. It seems that there are 
> more mixups than only these two examples...

I intentionally leave the receive buffer enabled so it's possible to
read the state of the pin (it's just a minor amount of extra power
overhead).  If leaving the Rx buffer enabled is inappropriate for some
of the special-purpose modes, it's easy enough to fix.

I'm not generally familiar with using the hardware functions other than
GPIO and direct PRU I/O to know what appropriate settings would be, and
would appreciate any help or pointers.  Known working device tree
overlays that exist outside the kernel tree are especially welcome as a
reference.

-- 
Charles Steinkuehler
[email protected]

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