On 5/19/2014 4:06 PM, Brandon I wrote:
> The pin mux registers require privileged memory access, which is why
> the kernel space is usually required.  The pru can write these!?

Of course.  The PRU is directly wired into the on-chip bus, and bypasses
all ARM side sanity checks like memory page access restrictions.  You
have 100% full control over anything the PRU can access, which is just
about every significant chunk of hardware on the die except for:

* SGX-530 GPU
* AES & SHA crypto accelerator
* USB
* MMC

Details are in the Interconnects section of the TRM (section 10), and
remember:

  With great power comes great responsibility!

-- 
Charles Steinkuehler
[email protected]

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