I'm not Jason. I'll answer, though. I have been looking at your presentation slides and am puzzled with Slide 25 > "PRU low-latency I/Os". I notice that a couple of the pins are suffixed > with 'PRU1_16 in' and 'PRU0_15 out 11 ---- 12 PRU0_14 out ' > > What is the significance of the in and out? > > Can the other GPIO pins be accessed by the PRU? >
A GPIO operates in a direction, either output or input. It's possible to change the direction at run-time. All GPIO subsystems can get controlled over the OCP master port (2-3 PRU cycles latency). Low latency GPIO can get controlled directly by the PRUSS at 100 MHz. Maximum 14 header pins are available on PRUSS-0 (when HDMI is disabled). Also can you point me at any examples which use the Analogue Inputs in the > PRU ? Find examples in the source code of libpruio <http://beagleboard.org/project/libpruio/>. BR -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
