I've been trying to hunt down the maximum frequency on the BeagleBone Black GPIO pins.
This *seems* to be dominated by the transaction latency across the L3/L4 interconnect. Fair enough. So ... What's the latency number? I've *measured* about 166ns per transaction (I can create a roughly 3MHz toggle which is 2 pin flips which requires 6MTransactions/s which is 166.66ns per transaction). But I don't know how to *calculate* that number from the documentation. I've been through the TI reference manuals, the TI support forums, and a bunch of other things, but *nobody* seems to be able to cough up an actual number for this. Anybody have some references to frequencies and bus wait numbers? They may be out there, but GTMF/RTFM doesn't seem to be sufficient. I don't need turbo speed, but the fact that it's entirely possible that I may not even be able run at 1MHz (something *painfully* easy for most M0 or M3/M4 cores) is, frankly, a bit of a shock. Thanks. -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
