OK, sorry, multi tasking here so i kind of left out some important information.
The PRU's have direct access to any peripheral on the am335x processor. So these PRU's can twiddle an SPI's registers, read from it's FIFO buffer, etc. This is very similar to what /dev/mem/ + mmap() would net you. However /dev/mem/ + mmap() would use the main processor to do this. From userspace Linux. Basically, you're going behind the kernels back. Or doing all this without the kernels knowledge. Once the register's memory is mapped. On Wed, Aug 3, 2016 at 6:21 PM, William Hermans <[email protected]> wrote: > > > On Wed, Aug 3, 2016 at 3:50 PM, Kirk <[email protected]> wrote: > >> I have a scope on the SPI signals there is nothing I can see that is a >> problem. The SPI hardware module is doing its job and clocking all the >> bits. >> It's recognizing the data ready, doing the SPI transfer, saving the data >> with time to spare. (99% of the time anyway) >> > > I can tell you that the SPI modules, as I recall are only set to run at > 16Mhz ? Something much lower than these modules max out at. I seem to > recall someone saying that these modules can easily run 50Mhz, but I can > not think of the source from which I read that. > >> >> To clarify, it's not overrunning a bit in the SPI word. >> The problem is that the data ready bit comes at a steady 3200Hz and >> sometimes it just doesn't get back in time for the next data transfer. >> As far as I can tell no fault of the code I'm running. >> > > Show us the code. You can't have anything we( who are programmers ) have > not seen already. But this way we( I ) can examine the code and tell if you > "we" see anything that can be a potential problem. > > >> The code is focused only on the tight loop that monitors the data ready >> bit and then uses the SPI to transfer the data. >> I assume there must be things going on in Linux like WiFi communications >> and Ethernet communications that interrupt my code. >> >> I'm using a somewhat older image. >> What image should I use to get started working with the PRU? >> >> Kirk >> > > It sounds like you might be running a 3.8.x kernel ? But you can start > with any image. However, I might suggest you start off with the newest > images. As changes have been made to make it simpler to use either > remoteproc, or uio_pruss. > > So what the PRU will net you is a tighter loop, that runs outside of > linux. So this means that your code can not be preempted by anything Linux. > Pretty much, and put very basically. It'll be like running your code on a > bare metal Cortex M3. NBut this Cortex M3 is special in that these do not > have a instruction pipeline. Which means that instructions typically take > only one cycle( 5ns ) There are multi cycle instructions, but you can do > your best to stay away from those as much as possible. *If* you need to. > Initially though, it seems like you'll have plenty of room, while still > being able to maintain your needed timing. > > What I would recommend that you try first is upgrading your kernel, and > upgrade to an rt kernel to see if that helps any. 4.x kernels by themselves > already seem more responsive to me, but it is entirely possible all you'll > need is an rt kernel. I've yet to test SPI on an rt kernel myself, but what > I have done is parse 1Mbit worth of CANBUS data, in realtime, parse out, > and send out via websockets around 1,000 seperate fields per second. So . . > . > > $ sudo apt-get update > $ apt-cache search linux-image |grep 4.4.*rt* > > And then just pick one of the newer bone, or TI kernels. Then give your > code a whirl on that. > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/CALHSORq-en5qx%2B-8zGk2i6%3DxAEPzE1t6J1SFoN7E1k%2BLuOuPOA%40mail.gmail.com. For more options, visit https://groups.google.com/d/optout.
