So one thing I noticed is that the eqep node isn't adding any clocks compared to EHRPWM and ECAP. So I would be curious if adding the following entries to the eqep node may solve. I don't really remember how we came up with this
clocks = <&l4_root_clk_div>; clock-names = "fck"; >From what I remember for ECAP and PWM that the PWMSS clock gate wouldn't allow a clock to be ungated once you tell it to gate it. However, the patch you mentioned shouldn't change anything because by default (on reset) PWMSS ungates the PWM, ECAP and EQEP clocks. You mind sharing a boot log showing this failure? Also can you share the patch your using now for the eqep driver along with dts changes? On 01/30/2017 03:15 AM, Drew Fustini wrote: > On Sun, Jan 29, 2017 at 3:13 AM, Drew Fustini <[email protected]> wrote: >> eqep was working for me in 4.4.x but I get a segmentation fault when I >> read the sysfs position file: >> # cat /sys/devices/platform/ocp/48304000.epwmss/48304180.eqep/position >> [ 1858.108446] Unhandled fault: external abort on non-linefetch >> (0x1028) at 0xfa304184 >> >> I'm now reading about pm_runtime_get_sync() in >> Documentation/power/runtime_pm.txt. I'll update if I make any >> progress. > > I'm still investigating but I did notice that the original tieqep > driver had this code to enable the clock to the eQEP unit: > https://github.com/Teknoman117/beaglebot/blob/master/encoders/patches/0001-tieqep-driver.patch#L721 > > // Enable the clock to the eQEP unit > status = pwmss_submodule_state_change(pdev->dev.parent, PWMSS_EQEPCLK_EN); > > // If we failed to enable the clocks, fail out > if (!(status & PWMSS_EQEPCLK_EN_ACK)) > { > dev_err(&pdev->dev, "PWMSS config space clock enable failed\n"); > ret = -EINVAL; > goto pwmss_clk_failure; > } > > The function pwmss_submodule_state_change() appears to have been > removed by this commit: > > commit cc37655e6bbf83ded1e4d1d7ffd977786a845a67 > Author: Cooper Jr., Franklin <[email protected]> > Date: Mon Mar 7 13:33:56 2016 -0600 > > pwm: pwm-ti*: Remove support for local clock gating > > The PWMSS local clock gating registers have no real purpose on OMAP ARM > devices. These registers were left over registers from DSP IP where the > PRCM doesn't exist. There is a silicon bug where gating and ungating > clocks > don't function properly. TRMs will be update to indicate that these > registers shouldn't be touched. > > Therefore, all code that accesses the PWMSS_CLKCONFIG or PWMSS_CLKSTATUS > will be removed by this patch with zero loss of functionality by the ECAP > and EPWM drivers. > > > -Drew > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/a438a516-5f97-9af8-cd26-0e95237544c6%40ti.com. For more options, visit https://groups.google.com/d/optout.
