On Sun, May 28, 2017 at 4:19 PM, jmelson <[email protected]> wrote:
>
> Since I can't get the devicetree working on the 4.4.62 kernel, I'm trying
> to set the GPIO pin configuration directly. I did this on the Beagle Board
> a long time ago, and am trying to adapt that code.
>
> So, I have this code :
>
> int fd = open("/dev/mem", O_RDWR | O_SYNC);
> volatile ulong *pinmux;
> pinmux = (ulong*) mmap(NULL, 0x2000, PROT_READ | PROT_WRITE,
> MAP_SHARED, fd, 0x44E10000);
> if (pinmux == MAP_FAILED) {
> printf("Pinmux Mapping failed\n");
> close(fd);
> }
> pinmux[0x0880/4] = 0x0f; // P8.25 GPIO1.0 write, no pulls,
> mode 7
> pinmux[0x0884/4] = 0x0f; // P8.24 GPIO1.1 write, no pulls,
> mode 7
>
> and then try to write values to the set and clear registers :
> fd = open("/dev/mem", O_RDWR | O_SYNC);
>
> // GPIO Configuration: configure are input
> volatile ushort *gpios;
> gpios = (ushort*) mmap(NULL, 0x2000, PROT_READ | PROT_WRITE,
> MAP_SHARED, fd, 0x4804C000);
> if (gpios == MAP_FAILED) {
> printf("Gpios Mapping failed\n");
> close(fd);
> }
> gpios[gpios_clear] = 0xff;
> gpios[gpios_set] = j;
>
>
> But I don't see any response. More oddly, I don't see any change in
> /sys/kernel/debug/pinctrl/44e10800.pinmux/pins
>
> Which lists the above pins as :
> pin 32 (44e10880.0) 00000032 pinctrl-single
> pin 33 (44e10884.0) 00000032 pinctrl-single
>
> I think I am writing 0x0f to those registers, and I still see 0x32, which
> would indicate why the GPIOs are not getting through to the header pins.
> If I read out the pinmux register in my program, it ALSO shows as 0x32, so
> apparently the write to that register is silently ignored.
>
>
> Has anybody done this and know where I'm going wrong?
>
What I'd do in your shoes is just use the sysfs gpio file structure to set
your pins how needed. You do not technically need to load anything from a
device tree file if all you're using is GPIO. Well any hardware module
really,if you know what you're doing, but many things are fairly complex.
Initially what you'll see with no device tree files loaded is this:
root@beaglebone:~# ls /sys/class/gpio/
export gpiochip0 gpiochip32 gpiochip64 gpiochip96 unexport
Here. the gpiochipxx entries are gpio banks, and the files export, and
unexport are for enabling / disabling pins as GPIO. So for instance, if you
need to use P8_12( I picked this pin because I'm fairly sure it's not used
by any running peripherals ), you'll need to look up the GPIO # for P8_12,
which is 44. Simply echo "44" to the export file like so:
root@beaglebone:~# echo '44' > /sys/class/gpio/export
Then you can see the sub directory for this pin is created:
root@beaglebone:~# ls /sys/class/gpio/
export *gpio44* gpiochip0 gpiochip32 gpiochip64 gpiochip96 unexport
After that we can explore the gpio44 sub directory.
root@beaglebone:~# ls /sys/class/gpio/gpio44/
active_low device direction edge power subsystem uevent value
- active_low I believe is how you set your pin high / low logic. e.g.
what state it is in by default(reverse logic, or not).
- direction is the file you need to change in order to set the pin as
input or output. values are limited to "in" or "out" I believe.
- edge is the file you set low to high or high to low edge detect in. I
do not remember all the values, but I think there are three one of which
can be "both". Setting this file is required if you want to use any pin
"event" monitoring.
- value is the file you set high, or low for high, or low pin state. In
the case of input, you can not change this file, but you can read from it.
Valid values are 0, and 1 for output pins. Input are the same except of
course you can not set the pin value, only read it.
Anyway, just google "how to beaglebone GPIO" and you'll find a lot of info
out there on the subject. Just experiment until you've got it, then create
a shell script to run at boot, or write a C file to directly setup your
pins on the fly. If you so wish.
--
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