thanks for comment. there is a microcontroller on the other side and I want to have faster communication.
On Monday, June 17, 2019 at 11:57:26 PM UTC+4:30, Dennis Lee Bieber wrote: > > On Mon, 17 Jun 2019 05:44:09 -0700 (PDT), > [email protected] <javascript:> declaimed the > following: > > > > >I want to send some data to a micro controller with a beaglebone black > >(beagle bone is master). As shown in the picture, the delay between > falling > >edge of cs and first rising edge of clock is too much. could you please > >tell me how to decrease it? the image is taken from a logic analyzer > which > >its sampling rate is lower than SPI bitrate. > > > > Why does it matter? Chip Select serves to "wake up" the target > chip, > making it ready to respond to the clock changes. Some targets may need the > time to activate circuits. Data transfer is done on the clock transitions. > A circuit with a single target could, in theory, have the CS line tied > permanently using a pull-up/pull-down resistor (since you state a falling > edge, I'd guess pull-down to ground would be the permanent mode). > > > > -- > Wulfraed Dennis Lee Bieber AF6VN > [email protected] <javascript:> > http://wlfraed.microdiversity.freeddns.org/ > > -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/2e27caed-a756-49f7-a6b2-8c7aacd1e033%40googlegroups.com. For more options, visit https://groups.google.com/d/optout.
