Hi! Am Dienstag, 26. Mai 2020 17:04:50 UTC+2 schrieb PAk Ys: > > Our signal will be in the tens of MHz (from 5Mhz to 50MHz max), depending > on configuration. > > The polling method is what I expected, however the manual (spruh73q) > states there are three methods (Direct Input, Parallel Mode and 28bit shift > Register), which confuses me. In your proposal, is Direct Input used? What > is the max speed at this mode, 100MHz? > What is the difference between using Parallel mode and Polling, the > automatic clocking? >
The shift register is limited to a single pin. GPIO is limited to 0V or 3V3, you have to adapt the input voltage. You've to use direct PRU-GPIO (up to 16 pins), in order to avoid L3 latency. Polling the clock signal needs only one cycle -> 200 MHz, but reading the lines and writing to memory consumes three further cycles -> 50 MHz main loop. So it should run reliable up to 25 MHz. In order to buffer the data you can use SRam (12 kB) or DRam (up to 16 kB). Regards -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/d459c132-2f3d-4ec5-a4b3-02b91f961cd1%40googlegroups.com.
