On Tue, 26 May 2020 08:04:49 -0700 (PDT), in
gmane.comp.hardware.beagleboard.user PAk Ys
<[email protected]> wrote:
>First of all, let me thank you for your answer.
>
>Our signal will be in the tens of MHz (from 5Mhz to 50MHz max), depending
>on configuration.
>
>The polling method is what I expected, however the manual (spruh73q) states
>there are three methods (Direct Input, Parallel Mode and 28bit shift
>Register), which confuses me. In your proposal, is Direct Input used? What
>is the max speed at this mode, 100MHz?
How many PRU instructions will be required to...
Sample the clock
Determine clock state changed (eg: compare to previous value and branch
back to top if same)
Read data pin(s)
Write the data to memory
Return to top
... oh, and if you need to first look for the frame synch, that adds
another loop around the above with its sample/test
At best, that looks to be 5 to 7 (frame synch version) instructions. A
five instruction loop with 200MHz processor results in 40MHz "baud rate".
If you need more instructions -- increment a memory pointer, say, that will
reduce the effective rate. If the worst case cycle (and you WILL have to do
that worst-case evaluation!) consumes 10 instructions, your effective rate
will only be 20MHz.
That is based upon the PRU assembler instruction set -- if using a
C-level source, you may need to have the compiler dump an assembly listing
so you can study the instructions needed by the loops...
--
Dennis L Bieber
--
For more options, visit http://beagleboard.org/discuss
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