Hi RobertCNelson,
Thank you for checking the relevant part.
the description of the Device tree is as follows. Is this overwriting the
setting? In fact, when I set this part to
bus-width = <0x08>
, the Boot time did not change much.
Could you tell me if there is a way to check the current transfer bit mode?
mmc@48060000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
ti,needs-special-hs-handling;
dmas = < 0x2d 0x18 0x00 0x00 0x2d 0x19 0x00 0x00 >;
dma-names = "tx\0rx";
interrupts = < 0x40 >;
reg = < 0x48060000 0x1000 >;
status = "okay";
bus-width = < 0x04 >; <=======
pinctrl-names = "default";
pinctrl-0 = < 0x2e >;
cd-gpios = < 0x2f 0x06 0x01 >;
vmmc-supply = < 0x30 >;
phandle = < 0x288 >;
};
Regards,
2021年2月23日火曜日 0:42:12 UTC+9 RobertCNelson:
> On Thu, Feb 18, 2021 at 1:10 AM ha ppay <[email protected]> wrote:
> >
> >
> > Hi Everyone.
> > I'm collecting information to get even faster boot times,
> > I have 2 questions.
> > It is written that it is possible to boot from MMC (8bit mode) (18.1.1
> MMCHS Features) using MMC mode with TRM of am335x.
> > - Clock support
> > -96-MHz functional clock source input
> > -up to 384Mbit/sec (48MByte/sec) in MMC mode 8-bit data transfer
> > -up to 192Mbit/sec (24MByte/sec) in High-Speed SD mode 4-bit data
> transfer
> > -up to 24Mbit/sec (3MByte/sec) in Default SD mode 1-bit data transfer
> >
> > Also, the SD_CON register DW8 Field has a flag for it.
> > I expect this setting to start up much faster.
> > In BBB, how do I set it to 8bit mode and how do I set the frequency to
> 384Mbit / sec (is it mmc_clk/clock-div in Devicetree?)?
>
> It's already in 8-bit mode..
>
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/am335x-boneblack-common.dtsi#n23
>
> &mmc2 {
> vmmc-supply = <&vmmcsd_fixed>;
> pinctrl-names = "default";
> pinctrl-0 = <&emmc_pins>;
> bus-width = <8>;
> status = "okay";
> non-removable;
> };
>
> Regards,
>
> --
> Robert Nelson
> https://rcn-ee.com/
>
--
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