Thanks for the comments, I just refine the comment as below: The case which trigger this corner case is as below: Clang/llvm may generate some code similar to the following IRs:
... (there is no definition of %7) br label 2 label1: %10 = add i32 %7, %6 ... ret label2: %8 = load <4 x i8> addrspace(1)* %3, align 4, !tbaa !1 %7 = extractelement <4 x i8> %8, i32 0 ... br label1 The value %7 is assigned after label2 but is referred at label1. >From the control flow, the IRs is valid. As the reference will be executed after the assignment. But the previous implementation doesn't allocate proxyvalue for %7, that's the root cause why it triggers an assert when visit the instruction %10 = add i32 %7, %6. On Fri, Dec 20, 2013 at 09:35:27AM +0800, Zhigang Gong wrote: > We should allocate register when we firstly visit ExtractElement > instruction, as we may refer the value before we visit that instruction > at the emit instruction pass. > > The case which trigger this corner case is as below: > Clang/llvm may generate some code similar to the following IRs: > > ... (there is no definition of %7) > br label 2 > > label1: > %10 = add %7, %6 > ... > ret > > label2: > %7 = ... > br label1 > > The value %7 is assigned after label2 but is referred at label1. > From the control flow, the IRs is valid. As the reference will > be executed after the assignment. > > Signed-off-by: Zhigang Gong <[email protected]> > --- > backend/src/llvm/llvm_gen_backend.cpp | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/backend/src/llvm/llvm_gen_backend.cpp > b/backend/src/llvm/llvm_gen_backend.cpp > index 1316d4b..bfba825 100644 > --- a/backend/src/llvm/llvm_gen_backend.cpp > +++ b/backend/src/llvm/llvm_gen_backend.cpp > @@ -1842,8 +1842,7 @@ namespace gbe > } > } > > - void GenWriter::regAllocateExtractElement(ExtractElementInst &I) {} > - void GenWriter::emitExtractElement(ExtractElementInst &I) { > + void GenWriter::regAllocateExtractElement(ExtractElementInst &I) { > Value *vec = I.getVectorOperand(); > const Value *index = I.getIndexOperand(); > const ConstantInt *c = dyn_cast<ConstantInt>(index); > @@ -1852,6 +1851,9 @@ namespace gbe > regTranslator.newValueProxy(vec, &I, i, 0); > } > > + void GenWriter::emitExtractElement(ExtractElementInst &I) { > + } > + > void GenWriter::regAllocateShuffleVectorInst(ShuffleVectorInst &I) {} > void GenWriter::emitShuffleVectorInst(ShuffleVectorInst &I) {} > > -- > 1.7.9.5 > > _______________________________________________ > Beignet mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/beignet _______________________________________________ Beignet mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/beignet
