tree a757869e15047111494e5e2b24f8c755ff781ca4 parent 13e886c3b435d14668aefaed449d8d7ca6dce3a8 author Marcelo Tosatti <[EMAIL PROTECTED]> Thu, 28 Jul 2005 01:44:08 -0700 committer Linus Torvalds <[EMAIL PROTECTED]> Thu, 28 Jul 2005 06:25:55 -0700
[PATCH] ppc32: 8xx: update DataTLBMiss exception comment On PPC 8xx, the DataTLBMiss handler does not jump directly to the page fault handler, as was the case in v2.4. It instead loads an invalid TLB which causes a subsequent DataTLBError exception. The comment on top of it haven't been update to reflect the change, though. Signed-off-by: Marcelo Tosatti <[EMAIL PROTECTED]> Signed-off-by: Andrew Morton <[EMAIL PROTECTED]> Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]> arch/ppc/kernel/head_8xx.S | 12 +++++------- 1 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S --- a/arch/ppc/kernel/head_8xx.S +++ b/arch/ppc/kernel/head_8xx.S @@ -288,13 +288,11 @@ SystemCall: * For the MPC8xx, this is a software tablewalk to load the instruction * TLB. It is modelled after the example in the Motorola manual. The task * switch loads the M_TWB register with the pointer to the first level table. - * If we discover there is no second level table (the value is zero), the - * plan was to load that into the TLB, which causes another fault into the - * TLB Error interrupt where we can handle such problems. However, that did - * not work, so if we discover there is no second level table, we restore - * registers and branch to the error exception. We have to use the MD_xxx - * registers for the tablewalk because the equivalent MI_xxx registers - * only perform the attribute functions. + * If we discover there is no second level table (value is zero) or if there + * is an invalid pte, we load that into the TLB, which causes another fault + * into the TLB Error interrupt where we can handle such problems. + * We have to use the MD_xxx registers for the tablewalk because the + * equivalent MI_xxx registers only perform the attribute functions. */ InstructionTLBMiss: #ifdef CONFIG_8xx_CPU6 - To unsubscribe from this list: send the line "unsubscribe bk-commits-head" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
