https://sourceware.org/bugzilla/show_bug.cgi?id=16017
Irfan Ahmad <h.IrfanAhmad at gmail dot com> changed:
What |Removed |Added
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CC| |h.IrfanAhmad at gmail dot com
--- Comment #15 from Irfan Ahmad <h.IrfanAhmad at gmail dot com> ---
One problem in coming up with a compact PLT, in present case, is that PC is not
allowed to be a source operand in ADD (and OR) instructions that take register
parameters (e.g. - add ip, pc - is illegal). So an intermediate register is
needed. I suggest the following variant:
1: b401 push {r0}
2: f20f 0000 addw r0, pc, #0
3: f240 0c00 movw ip, #0x0000 ; Lower 16 bits of GOT entry offset from
PC
4: f2c0 0c00 movt ip, #0x0000 ; Upper 16 bits of GOT entry offset from
PC
5: 4484 add ip, r0
6: bc01 pop {r0}
7: f8dc f000 ldr.w pc, [ip]
This comes to 22 bytes but has the plus side that 32-bit offsets can be handled
allowing GOT to be anywhere in the 32-bit address space.
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