https://sourceware.org/bugzilla/show_bug.cgi?id=21373
Bug ID: 21373 Summary: intel syntax on x86_64 offset miscalculation Product: binutils Version: 2.29 (HEAD) Status: NEW Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: amodra at gmail dot com Target Milestone: --- >From http://lists.gnu.org/archive/html/bug-binutils/2017-04/msg00079.html Assembling the following on x86_64-linux .att_syntax noprefix mov rax, 0x10(rbp) mov ebx, 0x20(rbx) mov ax, 0x30(rcx) mov cl, 0x40(rdx) .intel_syntax noprefix mov qword [rbp + 0x10], rax mov dword [rbx + 0x20], ebx mov word [rcx + 0x30], ax mov byte [rdx + 0x40], cl produces 0000000000000000 <.text>: 0: 48 89 45 10 mov %rax,0x10(%rbp) 4: 89 5b 20 mov %ebx,0x20(%rbx) 7: 66 89 41 30 mov %ax,0x30(%rcx) b: 88 4a 40 mov %cl,0x40(%rdx) e: 48 89 45 18 mov %rax,0x18(%rbp) 12: 89 5b 24 mov %ebx,0x24(%rbx) 15: 66 89 41 32 mov %ax,0x32(%rcx) 19: 88 4a 41 mov %cl,0x41(%rdx) Notice the register size offset miscalculation for intel syntax. -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils