https://sourceware.org/bugzilla/show_bug.cgi?id=23192
Bug ID: 23192
Summary: aarch64: indexed fcmla doesn't support all registers
Product: binutils
Version: 2.30
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: i-bugzilla-sourceware-org-kasujfzh at rf dot risimo.net
Target Milestone: ---
$ cat fcmla.asm
.global main
.section .text
.balign 4
main:
fcmla v0.8h,v1.8h,v2.h[0],#270
fcmla v0.8h,v0.8h,v27.h[0],#270
ret
$ as -mcpu=saphira -o fcmla.o fcmla.asm
fcmla.asm: Assembler messages:
fcmla.asm:7: Error: register number out of range 0 to 15 at operand 3 -- `fcmla
v0.8h,v0.8h,v27.h[0],#270'
$
According to the docs I have there no restriction to the range of the third
register since the full 5 bits are encoded in M:Rm and M can be 1.
There is a related bug in objdump which says that such opcodes with M=1 (like
for example 0x6f5b7000) are invalid. If required I will file another issue for
this.
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