https://sourceware.org/bugzilla/show_bug.cgi?id=23418
--- Comment #1 from H.J. Lu <hjl.tools at gmail dot com> --- This looks odd: /* Return 1 if there is no conflict in any size on operand J for instruction template T. */ static INLINE int match_mem_size (const insn_template *t, unsigned int wanted, unsigned int given){ return (match_reg_size (t, wanted, given) && !((i.types[given].bitfield.unspecified && !i.broadcast && !t->operand_types[wanted].bitfield.unspecified) || (i.types[given].bitfield.fword && !t->operand_types[wanted].bitfield.fword) /* For scalar opcode templates to allow register and memory operands at the same time, some special casing is needed here. Also for v{,p}broadcast*, {,v}pmov{s,z}*, and down-conversion vpmov*. */ || ((t->operand_types[wanted].bitfield.regsimd && !t->opcode_modifier.broadcast && (t->operand_types[wanted].bitfield.byte || t->operand_types[wanted].bitfield.word || t->operand_types[wanted].bitfield.dword || t->operand_types[wanted].bitfield.qword)) ? (i.types[given].bitfield.xmmword || i.types[given].bitfield.ymmword || i.types[given].bitfield.zmmword) : !match_simd_size(t, wanted, given)))); } -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils