https://sourceware.org/bugzilla/show_bug.cgi?id=24258
--- Comment #5 from Sudakshina Das <sudi at gcc dot gnu.org> --- If we take Armv8.5-A as an example and if we check include/opcode/aarch64.h for all the new feature bits added /* Flag Manipulation insns. */ #define AARCH64_FEATURE_FLAGMANIP 0x4000000000ULL /* FRINT[32,64][Z,X] insns. */ #define AARCH64_FEATURE_FRINTTS 0x8000000000ULL /* SB instruction. */ #define AARCH64_FEATURE_SB 0x10000000000ULL /* Execution and Data Prediction Restriction instructions. */ #define AARCH64_FEATURE_PREDRES 0x20000000000ULL /* DC CVADP. */ #define AARCH64_FEATURE_CVADP 0x40000000000ULL /* Random Number instructions. */ #define AARCH64_FEATURE_RNG 0x80000000000ULL /* BTI instructions. */ #define AARCH64_FEATURE_BTI 0x100000000000ULL /* SCXTNUM_ELx. */ #define AARCH64_FEATURE_SCXTNUM 0x200000000000ULL /* ID_PFR2 instructions. */ #define AARCH64_FEATURE_ID_PFR2 0x400000000000ULL /* SSBS mechanism enabled. */ #define AARCH64_FEATURE_SSBS 0x800000000000ULL /* Memory Tagging Extension. */ #define AARCH64_FEATURE_MEMTAG 0x1000000000000ULL These can all be potentially added by a ARMv8.4-A implementation but do not all have command line options. -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ bug-binutils mailing list [email protected] https://lists.gnu.org/mailman/listinfo/bug-binutils
