Paul, w/respect to this makefile:
$ cat -n makefile 1 .RECIPEPREFIX := > 2 $(foreach x,1,$(eval all: A := $$x)) 3 all: 4 >$(eval $@: B := 1) 5 >$(foreach x,1,$(eval all: C := $$x)) 6 >$(foreach x,1,$(eval $$@: D := $$x)) 7 >$(foreach x,1,$(eval $@: E := $$x)) 8 >$(foreach x,1,$(eval $@: F := $x)) ... if I may put words in their mouth, the OP is making the following claims: * Line 2 makes a target-specific variable A == 1 * Ditto on line 4 with B == 1 * Since 4 works && lines 2 / 5 are identical (except the latter is in the recipe body) they should have the same effect * Ditto for lines 6 & 7 Line 8 is my own addition; it does what the OP expects; that is, it's necessary to replace $$x with $x. If any of lines 5-7 are changed such that the variable being defined isn't target-specific it works fine. There only appears to be a difference for target-specific variables when another level of expansion will occur, as in non-recursive variable assignment. In the OPs case I don't think they need $$x, but in general the behavior does seem inconsistent. -brian On Wed, Sep 26, 2018 at 5:47 AM Michael Builov <invalid.nore...@gnu.org> wrote: > > Follow-up Comment #2, bug #54727 (project make): > > > By the time we expand the recipe all target-specific variables for that > recipe have already been assigned: it's not possible for the recipe to add > more target-specific variables to it's target and have those take effect. > > But this is works: > > $ echo 'all:; $(eval $$@: x:=1)$(info $x)' | make -f - > > result: > 1 > > > To ensure that the real target-specific variable is being used, please try the > following makefile: > > ###### > x:=g > all: a b > a:; $(eval $$@: x:=t)$(info $@: $x) > b:; $(info $@: $x) > ###### > > result: > a: t > b: g > > > > > If you try to define a new target inside a recipe you'll get a fatal error. > > Yes, it is expected, and I fully agree with this behavior. > > $ echo 'all:; $(eval x:)' | make -f - > > result: > '*** prerequisites cannot be defined in recipes. Stop.' > > > -------- > > Creating/assigning values to the target-specific variables in the recipes can > be used to avoid pollution of the global namespace. > > Let's look at an example of a rule that generates several files ('b' and 'c') > at once (it can be GNU bison). > > ###### > all: a b c > a: b c > a: done:= > b c:; $(if $(done),,$(eval a: done:=1)touch b c) > ###### > > The command to generate the 'b' and 'c' files will only be executed once, even > if make is run with the -j option. > > _______________________________________________________ > > Reply to this item at: > > <https://savannah.gnu.org/bugs/?54727> > > _______________________________________________ > Message sent via Savannah > https://savannah.gnu.org/ > > > _______________________________________________ > Bug-make mailing list > Bug-make@gnu.org > https://lists.gnu.org/mailman/listinfo/bug-make _______________________________________________ Bug-make mailing list Bug-make@gnu.org https://lists.gnu.org/mailman/listinfo/bug-make