Follow-up Comment #9, bug #57751 (project make): I don't believe that this (allowing $@ in prerequisites) is "traditional make" behavior.
However, I admit to being surprised when I went to look at the POSIX spec for make that it is very wishy-washy and unclear as to exactly where the internal macros are available. It just says they "can be used in target and inference rules". I would have expected it to say that specifically that they can be used in commands. So, maybe I'm wrong. In any event, I assumed that this is a typo. I thought that the rule was intended to be: .SCCS_GET: ; sccs $(SCCSFLAGS) get $(SCCSGETFLAGS) $@ Note the added semicolon. Is it really the case that you define the _COMMAND_ to run SCCS get operations as _PREREQUISITES_ to the special target? That's.... horrible and disgusting. _______________________________________________________ Reply to this item at: <https://savannah.gnu.org/bugs/?57751> _______________________________________________ Message sent via Savannah https://savannah.gnu.org/