The following reply was made to PR system/6402; it has been noted by GNATS.

From: Stuart Henderson <[email protected]>
To: Joe Gidi <[email protected]>
Cc: [email protected]
Subject: Re: system/6402: Realtek 8168 NIC not working on Asus M4A88TD-V 
motherboard
Date: Wed, 16 Jun 2010 09:55:29 +0100

 >      Realtek 8168 attaches correctly as re0 but is nonfunctional. MAC address
 > comes up as all zeros. Asus literature identifies this NIC as an 8111E,
 > but pcidump identifies it as an 8168. Looks like FreeBSD's version of
 > this driver recently added support for this model:
 > http://www.freebsd.org/cgi/cvsweb.cgi/src/sys/dev/re/if_re.c
 
 you could give this a try. we're out of space for new RL_FLAGs but
 RL_FLAG_PCI_64BIT isn't doing anything useful so I've reused that.
 
 Index: re.c
 ===================================================================
 RCS file: /cvs/src/sys/dev/ic/re.c,v
 retrieving revision 1.119
 diff -u -p -r1.119 re.c
 --- re.c       19 May 2010 15:27:35 -0000      1.119
 +++ re.c       16 Jun 2010 08:53:56 -0000
 @@ -233,6 +233,7 @@ static const struct re_revision {
        { RL_HWREV_8168CP,      "RTL8168CP/8111CP" },
        { RL_HWREV_8168D,       "RTL8168D/8111D" },
        { RL_HWREV_8168DP,      "RTL8168DP/8111DP" },
 +      { RL_HWREV_8168E,       "RTL8168E/8111E" },
        { RL_HWREV_8169,        "RTL8169" },
        { RL_HWREV_8169_8110SB, "RTL8169/8110SB" },
        { RL_HWREV_8169_8110SBL, "RTL8169SBL" },
 @@ -856,6 +857,10 @@ re_attach(struct rl_softc *sc, const cha
                 */
                sc->rl_flags |= RL_FLAG_NOJUMBO;
                break;
 +      case RL_HWREV_8168E:
 +              sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM |
 +                  RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
 +                  RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO;
        case RL_HWREV_8169_8110SB:
        case RL_HWREV_8169_8110SBL:
        case RL_HWREV_8169_8110SCd:
 @@ -903,9 +908,6 @@ re_attach(struct rl_softc *sc, const cha
                        sc->rl_bus_speed = 33;
                        break;
                }
 -
 -              if (cfg2 & RL_CFG2_PCI_64BIT)
 -                      sc->rl_flags |= RL_FLAG_PCI64;
        }
  
        re_config_imtype(sc, sc->rl_imtype);
 @@ -1113,6 +1115,8 @@ re_attach(struct rl_softc *sc, const cha
        timeout_set(&sc->timer_handle, re_tick, sc);
  
        /* Take PHY out of power down mode. */
 +      if (sc->rl_flags & RL_FLAG_PHYWAKE_PM)
 +              CSR_WRITE_1(sc, RL_PMCH, CSR_READ_1(sc, RL_PMCH) | 0x80);
        if (sc->rl_flags & RL_FLAG_PHYWAKE) {
                re_gmii_writereg((struct device *)sc, 1, 0x1f, 0);
                re_gmii_writereg((struct device *)sc, 1, 0x0e, 0);
 Index: rtl81x9reg.h
 ===================================================================
 RCS file: /cvs/src/sys/dev/ic/rtl81x9reg.h,v
 retrieving revision 1.67
 diff -u -p -r1.67 rtl81x9reg.h
 --- rtl81x9reg.h       10 Aug 2009 20:29:54 -0000      1.67
 +++ rtl81x9reg.h       16 Jun 2010 08:53:56 -0000
 @@ -138,6 +138,7 @@
  #define RL_GMEDIASTAT         0x006C  /* 8 bits */
  #define RL_MACDBG             0x006D  /* 8 bits */
  #define RL_GPIO                       0x006E  /* 8 bits */
 +#define RL_PMCH                       0x006F  /* 8 bits */
  #define RL_LDPS                       0x0082  /* Link Down Power Saving */
  #define RL_MAXRXPKTLEN                0x00DA  /* 16 bits, chip multiplies by 
8 */
  #define RL_IM                 0x00E2
 @@ -168,6 +169,7 @@
  #define RL_HWREV_8103E                0x24C00000
  #define RL_HWREV_8168D                0x28000000
  #define RL_HWREV_8168DP               0x28800000
 +#define RL_HWREV_8168E                0x2C000000
  #define RL_HWREV_8168_SPIN1   0x30000000
  #define RL_HWREV_8100E_SPIN1  0x30800000
  #define RL_HWREV_8101E                0x34000000
 @@ -822,7 +824,7 @@ struct rl_softc {
        int                     rl_txstart;
        u_int32_t               rl_flags;
  #define       RL_FLAG_MSI             0x0001
 -#define       RL_FLAG_PCI64           0x0002
 +#define       RL_FLAG_PHYWAKE_PM      0x0002
  #define       RL_FLAG_PCIE            0x0004
  #define       RL_FLAG_INVMAR          0x0008
  #define       RL_FLAG_PHYWAKE         0x0010

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