On Wed, May 19, 2021 at 08:14:32AM +0200, Janne Johansson wrote:
> Not a huge amount of info available from the virtualization env, but
> something in CPU detection broke down. Will try snap/6.8 too, but for
> now, this is what the serial console gives me:
> ----------------------------------------------
> 
> >> OpenBSD/amd64 BOOT 3.53
> com0: changing speed to 115200 baud in 5 seconds, change your terminal to 
> match!
> 
> com0: 115200 baud
> boot> 
> |/-\|/-\|/booting hd0a:/bsd: 
> -\|/-\14325032|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-+3216400\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-+336448\|/-\|/-\|/-\|/-\|/-\+0+1175552|
>  
> [1017743/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\+128+1142976|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/+864173-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-]=0x1510c80
> entry point at 0xffffffff81001000
> [ using 3026048 bytes of bsd ELF symbol table ]
> Copyright (c) 1982, 1986, 1989, 1991, 1993
>       The Regents of the University of California.  All rights reserved.
> Copyright (c) 1995-2021 OpenBSD. All rights reserved.  https://www.OpenBSD.org
> 
> OpenBSD 6.9 (GENERIC) #464: Mon Apr 19 10:28:56 MDT 2021
>     dera...@amd64.openbsd.org:/usr/src/sys/arch/amd64/compile/GENERIC
> real mem = 4278034432 (4079MB)
> avail mem = 4133101568 (3941MB)
> random: good seed from bootblocks
> mpath0 at root
> scsibus0 at mpath0: 256 targets
> mainbus0 at root
> bios0 at mainbus0: SMBIOS rev. 2.8 @ 0xf6130 (11 entries)
> bios0: vendor SeaBIOS version "1.11.0-2.el7" date 04/01/2014
> bios0: RDO OpenStack Compute
> acpi0 at bios0: ACPI 1.0
> acpi0: sleep states S5
> acpi0: tables DSDT FACP APIC
> acpi0: wakeup devices
> acpitimer0 at acpi0: 3579545 Hz, 24 bits
> acpimadt0 at acpi0 addr 0xfee00000: PC-AT compat
> cpu0 at mainbus0: apid 0 (boot processor)
> cpu0: AMD EPYC 7502 32-Core Processor, 2500.58 MHz, 17-31-00
> cpu0: 
> FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,MMX,FXSR,SSE,SSE2,SSE3,PCLMUL,SSSE3,FMA3,CX16,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,HV,NXE,MMXX,FFXSR,PAGE1GB,RDTSCP,LONG,LAHF,CMPLEG,SVM,AMCR8,ABM,SSE4A,MASSE,3DNOWP,OSVW,FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,RDSEED,ADX,SMAP,CLFLUSHOPT,CLWB,SHA,UMIP,IBPB,VIRTSSBD,XSAVEOPT,XSAVEC,XGETBV1
> cpu0: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB 
> 64b/line 16-way L2 cache
> cpu0: ITLB 255 4KB entries direct-mapped, 255 4MB entries direct-mapped
> cpu0: DTLB 255 4KB entries direct-mapped, 255 4MB entries direct-mapped
> kernel: protection fault trap, code=0
> Stopped at      identifycpu+0x9f4:      rdmsr
> ddb>

this would appear to be

        /*
         * "Mitigation G-2" per AMD's Whitepaper "Software Techniques
         * for Managing Speculation on AMD Processors"
         *
         * By setting MSR C001_1029[1]=1, LFENCE becomes a dispatch
         * serializing instruction.
         *
         * This MSR is available on all AMD families >= 10h, except 11h
         * where LFENCE is always serializing.
         */
        if (!strcmp(cpu_vendor, "AuthenticAMD")) {
                if (ci->ci_family >= 0x10 && ci->ci_family != 0x11) {
                        uint64_t msr;

                        msr = rdmsr(MSR_DE_CFG);
                        if ((msr & DE_CFG_SERIALIZE_LFENCE) == 0) {
                                msr |= DE_CFG_SERIALIZE_LFENCE;
                                wrmsr(MSR_DE_CFG, msr);
                        }
                }
        }

https://developer.amd.com/wp-content/resources/90343-B_SoftwareTechniquesforManagingSpeculation_WP_7-18Update_FNL.pdf

states

"Applicability: All AMD family 10h/12h/14h/15h/16h/17h processors
support this MSR. LFENCE support is indicated by CPUID function1
EDX bit 26, SSE2. AMD family 0Fh/11h processors support LFENCE as
serializing always but do not support this MSR. AMD plans support
for this MSR and access to this bit for all future processors."

So your virtualised platform appears to not keep this promise.

On amd64 where we have rdmsr_safe we could do the below and hope lfence
serialises?

Index: sys/arch/amd64/amd64/identcpu.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/identcpu.c,v
retrieving revision 1.118
diff -u -p -r1.118 identcpu.c
--- sys/arch/amd64/amd64/identcpu.c     31 Dec 2020 06:22:33 -0000      1.118
+++ sys/arch/amd64/amd64/identcpu.c     19 May 2021 09:52:49 -0000
@@ -658,8 +658,8 @@ identifycpu(struct cpu_info *ci)
                if (ci->ci_family >= 0x10 && ci->ci_family != 0x11) {
                        uint64_t msr;
 
-                       msr = rdmsr(MSR_DE_CFG);
-                       if ((msr & DE_CFG_SERIALIZE_LFENCE) == 0) {
+                       if (rdmsr_safe(MSR_DE_CFG, &msr) == 0 &&
+                           ((msr & DE_CFG_SERIALIZE_LFENCE) == 0)) {
                                msr |= DE_CFG_SERIALIZE_LFENCE;
                                wrmsr(MSR_DE_CFG, msr);
                        }

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