On Wed, May 19, 2021 at 04:41:59PM +0200, Janne Johansson wrote:
> On Wed, May 19, 2021 at 08:00:09PM +1000, Jonathan Gray wrote:
> > On Wed, May 19, 2021 at 08:14:32AM +0200, Janne Johansson wrote:
> > > Not a huge amount of info available from the virtualization env, but
> > > something in CPU detection broke down. Will try snap/6.8 too, but for
> > > now, this is what the serial console gives me:
> > > ----------------------------------------------
> > > cpu0: AMD EPYC 7502 32-Core Processor, 2500.58 MHz, 17-31-00
> > > cpu0:
> > > FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,MMX,FXSR,SSE,SSE2,SSE3,PCLMUL,SSSE3,FMA3,CX16,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,HV,NXE,MMXX,FFXSR,PAGE1GB,RDTSCP,LONG,LAHF,CMPLEG,SVM,AMCR8,ABM,SSE4A,MASSE,3DNOWP,OSVW,FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,RDSEED,ADX,SMAP,CLFLUSHOPT,CLWB,SHA,UMIP,IBPB,VIRTSSBD,XSAVEOPT,XSAVEC,XGETBV1
> > > cpu0: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
> > > 64b/line 16-way L2 cache
> > > cpu0: ITLB 255 4KB entries direct-mapped, 255 4MB entries direct-mapped
> > > cpu0: DTLB 255 4KB entries direct-mapped, 255 4MB entries direct-mapped
> > > kernel: protection fault trap, code=0
> > > Stopped at identifycpu+0x9f4: rdmsr
> > > ddb>
> >
> > On amd64 where we have rdmsr_safe we could do the below and hope lfence
> > serialises?
> >
> > Index: sys/arch/amd64/amd64/identcpu.c
> > ===================================================================
> > RCS file: /cvs/src/sys/arch/amd64/amd64/identcpu.c,v
> > retrieving revision 1.118
> > diff -u -p -r1.118 identcpu.c
> > --- sys/arch/amd64/amd64/identcpu.c 31 Dec 2020 06:22:33 -0000 1.118
> > +++ sys/arch/amd64/amd64/identcpu.c 19 May 2021 09:52:49 -0000
> > @@ -658,8 +658,8 @@ identifycpu(struct cpu_info *ci)
> > if (ci->ci_family >= 0x10 && ci->ci_family != 0x11) {
> > uint64_t msr;
> >
> > - msr = rdmsr(MSR_DE_CFG);
> > - if ((msr & DE_CFG_SERIALIZE_LFENCE) == 0) {
> > + if (rdmsr_safe(MSR_DE_CFG, &msr) == 0 &&
> > + ((msr & DE_CFG_SERIALIZE_LFENCE) == 0)) {
> > msr |= DE_CFG_SERIALIZE_LFENCE;
> > wrmsr(MSR_DE_CFG, msr);
> > }
>
> It boots with this patch in, both on intel+vbox and the above AMD+kvm
> combination.
>
> ...
> cpu0: 64KB 64b/line 2-way I-cache, 64KB 64b/line 2-way D-cache, 512KB
> 64b/line 16-way L2 cache
> cpu0: ITLB 255 4KB entries direct-mapped, 255 4MB entries direct-mapped
> cpu0: DTLB 255 4KB entries direct-mapped, 255 4MB entries direct-mapped
> cpu0: smt 0, core 0, package 0
> mtrr: Pentium Pro MTRR support, 8 var ranges, 88 fixed ranges
> cpu0: apic clock running at 1000MHz
> ioapic0 at mainbus0: apid 0 pa 0xfec00000, version 11, 24 pins
> ...
>
Can you report this upstream?
