Joel Sherrill commented on a discussion: https://gitlab.rtems.org/rtems/docs/rtems-docs/-/work_items/159#note_158054 The arm also has the xilinx_zynqmp_ultra96 BSP (family xilinx-zynqmp) which uses the SoC in 32 bit mode.I don't think this moves and the User guide should cover this. It is solidly confusing. -- View it on GitLab: https://gitlab.rtems.org/rtems/docs/rtems-docs/-/work_items/159#note_158054 You're receiving this email because of your account on gitlab.rtems.org. Unsubscribe from this thread: https://gitlab.rtems.org/-/sent_notifications/5-eoa7bnt3pyeef6c9qxfyfassm-j/unsubscribe | Manage all notifications: https://gitlab.rtems.org/-/profile/notifications | Help: https://gitlab.rtems.org/help
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