Gedare Bloom commented on a discussion on bsps/riscv/riscv/irq/rnmi.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1391#note_158447 > +#include <rtems/score/cpu.h> > +#include <rtems/score/percpu.h> > +#include <rtems/score/riscv-utility.h> > +#include <rtems/score/smpimpl.h> > + > +/* Per-core deferred RNMI contexts */ > +static RISCV_RNMI_Context _RISCV_RNMI_context[CPU_MAXIMUM_PROCESSORS]; > + > +static void _RISCV_RNMI_deferred_enable_action(void *arg) > +{ > + (void)arg; > + uint32_t cpu_index = _Per_CPU_Get_index(_Per_CPU_Get()); > + uintptr_t ctx_addr = (uintptr_t)&_RISCV_RNMI_context[cpu_index]; > + > + /* Enable deferred processing on this hart */ > + write_csr(0x740, ctx_addr); I would make a conditional define as part of riscv-utility.h -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1391#note_158447 You're receiving this email because of your account on gitlab.rtems.org. Unsubscribe from this thread: https://gitlab.rtems.org/-/sent_notifications/5-bmt055r67hfmjy6e8aj5x845d-1d/unsubscribe | Manage all notifications: https://gitlab.rtems.org/-/profile/notifications | Help: https://gitlab.rtems.org/help
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