as a side note, has anyone done any sqm/cake work on say yocto or legato ??
On Wed, Aug 1, 2018 at 2:49 PM [email protected] <[email protected]> wrote:
>
> Yeah. Small FF 2 port Celeron board is what I use. And I have a 4 port Atom
> that runs like a bat out of hell.
>
> Currenty fiddling with Xilinx Dev boards, just put packet processing in FPGA
> for Cake, and no problem with 2.5 - 10 Gb/sec. Just need a free piece of low
> level SFP+ interfacing logic.
>
> My use case is using the open ChipLink/TileLink bus from RISCV rather than
> PCIe, making something that might be an open source ASIC design.
>
>
> -----Original Message-----
> From: "Toke Høiland-Jørgensen" <[email protected]>
> Sent: Wed, Aug 1, 2018 at 5:23 am
> To: "Dave Taht" <[email protected]>, "Daniel Ezell" <[email protected]>
> Cc: "Dave Taht" <[email protected]>, "Daniel Ezell" <[email protected]>,
> "Cake List" <[email protected]>, [email protected]
> Subject: Re: [Cerowrt-devel] expressobin
>
> Dave Taht writes:
>
> > It turns out it's just two ethernets with one, connected to a 2 port
> > switch. Not what I wanted. I'd wanted something different from the
> > apu2 or edgerouter X to play with, and I know the mvneta driver was
> > bql'd.
>
> I bought one of these to play with:
> https://teklager.se/en/products/routers/tlsense-i3-4lan
>
> x86 (i3 processor), four real ethernet ports, and passively cooled. A
> bit pricy, though; more than $400... But doubles well as a combined
> switch and media player :)
>
> -Toke
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