Hi Jonathan,
> On Sep 28, 2023, at 14:33, Jonathan Morton <chromati...@gmail.com> wrote:
>
>> On 28 Sep, 2023, at 3:15 pm, Sebastian Moeller <moell...@gmx.de> wrote:
>>
>> This promises even better performance for loads like cake than the already
>> pretty nifty pi4B
>
> Well, increased computing performance is always welcome - but as I've said
> before, in most cases I don't think CPU performance is the limiting factor
> for CAKE.
>
> When the CPU load goes up as networking throughput reaches the physical limit
> of the interface (or the I/O subsystem), what you're seeing is the CPU just
> spinning its wheels while waiting for a mutex to unblock. Spinning faster
> doesn't make the mutex unblock sooner!
[SM] I think that the improvements of cache and memory hierarchy and
throughput will be helpful, currently some people report odd issues with rpi4Bs
depending on how many and which cores are used, I hope that the rpi5
ameliorates these issues. The gigabit ethernet adapter was already connected
well to the SoC starting with the rpi4 when they ditched the USB2 bus used by
earlier pis to connect the ethernet. But I agree it will require real
benchmarks to see if the newer design truly delivers more cake performance and
if yes, how much more. (And I also note that the rpi4B is not doing badly at 1
Gbps ethernet either, at least for "normal" numbers of parallel flows.
Regarding a full dual (or triple) interface router, I have hopes that a
PCIe connected NIC might be generally better than a USB3 dongle (even though
USB3 on paper has plenty capacity for gigabit ethernet).
Regards
Sebastian
P.S.: I am tempted, but will likely wait until they are available in quantity
and hope that the street price comes down a bit before getting one ;)
>
> - Jonathan Morton
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