Re: [casper] Behavioral HDL in 10.1

[Henry Chen]

I think in general for things like adders and multipliers, we should stick
to the Xilinx LogiCores (no behavioral hdl) until somebody has the time to
evaluate the tradeoffs. For the delay block specifically, it looks like the
behavioral hdl option is supposed to be equivalent to turning on register
retiming, so that would depend on the application.

Thanks,
Henry


G Jones wrote:

Hello again,
Sorry for all the 10.1 related emails.

Does anyone know if libraries in general should use the "Behavioral HDL" option or not? The register retiming parameter seems to have changed to Behavioral HDL in the delay block for instance. Do these really behave the same way?

Thanks,
Glenn