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• [casper] Spectrum frequency shifting Liju Philip
• [casper] FFT Comparison 'Ross Martin' via casper@lists.berkeley.edu
  • [casper] Re: FFT Comparison 'Ross Martin' via casper@lists.berkeley.edu
• [casper] slack casper-astro ? Vereese Van Tonder
  • [casper] Re: slack casper-astro ? Vereese Van Tonder
  • RE: [casper] slack casper-astro ? {External} Walter Klahold
• [casper] Casper in Ubuntu 24.04 Bishnu Kumar Sharma
  • Re: [casper] Casper in Ubuntu 24.04 Mitchell Burnett
• [casper] RFSoC 4x2 interlocked with an external 10 MHz reference Diego Gallardo
  • Re: [casper] RFSoC 4x2 interlocked with an external 10 MHz reference Kaj Wiik
• [casper] Casper development for RFSoC 4x2 on RHEL8 Walter Klahold
  • [casper] Re: Casper development for RFSoC 4x2 on RHEL8 Emiliano Alfonso Toledo Silva
  • Re: [casper] Re: Casper development for RFSoC 4x2 on RHEL8 {External} Walter Klahold
• [casper] Delay in spectrum adquisition from RFSoC 4x2 Maximiliano Prieto
• [casper] Changing SLX file names causes LUT errors during jasper compiles. Ken Semanov
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Kaj Wiik
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Andrew Martens
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Mitchell Burnett
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Ken Semanov
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Ken Semanov
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Ken Semanov
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Ken Semanov
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Mitchell Burnett
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Mitchell Burnett
  • Re: [casper] Changing SLX file names causes LUT errors during jasper compiles. Kaj Wiik
• [casper] Deadline: AP-RASC Session J01 - 20 February 2025 Francois Kapp
• [casper] RFSoC 4x2 correlator Liju Philip
• [casper] Matlab toolboxes for CasperFPGA Clifford van Dyk
  • Re: [casper] Matlab toolboxes for CasperFPGA Morag Brown
  • Re: [casper] Matlab toolboxes for CasperFPGA Clifford van Dyk
  • Re: [casper] Matlab toolboxes for CasperFPGA Morag Brown
• [casper] assistant project scientist job posting 'Dan Werthimer' via casper@lists.berkeley.edu
• Re: [casper] Runtime Error in casperfpga in RFSOC 4x2 board Jack Hickish
  • Re: [casper] Runtime Error in casperfpga in RFSOC 4x2 board Jack Hickish
  • Re: [casper] Runtime Error in casperfpga in RFSOC 4x2 board Bishnu Kumar Sharma
• [casper] Custom library creation Walter Klahold
• [casper] Simulation stuck Heystek Grobler
  • Re: [casper] Simulation stuck Andrew Martens
  • Re: [casper] Simulation stuck Heystek Grobler
  • Re: [casper] Simulation stuck Bishnu Kumar Sharma
  • Re: [casper] Simulation stuck Mugundhan vijayaraghavan
  • Re: [casper] Simulation stuck Andrew Martens
• [casper] FPGA Readout Solutions Colm Bracken
• [casper] RFSoC 4x2 Packaging Jack Hickish
• [casper] /casperfpga/snap.py does not properly handle embedded mask values. Ken Semanov
  • [casper] Re: /casperfpga/snap.py does not properly handle embedded mask values. Ken Semanov
• [casper] ZCU111 ADCs Vereese Van Tonder
  • Re: [casper] ZCU111 ADCs Jack Hickish
  • Re: [casper] ZCU111 ADCs Jack Hickish
  • Re: [casper] ZCU111 ADCs Vereese Van Tonder
  • Re: [EXT] [casper] ZCU111 ADCs Marrone, Dan - (dmarrone)
  • Re: [EXT] [casper] ZCU111 ADCs Vereese Van Tonder
  • Re: [EXT] [casper] ZCU111 ADCs Kapp, Francois B.
  • RE: [EXT] [casper] ZCU111 ADCs {External} Matthew Schiller
  • Re: [EXT] [casper] ZCU111 ADCs {External} 'Ross Martin' via casper@lists.berkeley.edu
  • Re: [casper] ZCU111 ADCs Kaj Wiik
  • Re: [casper] ZCU111 ADCs Vereese Van Tonder
• [casper] Call for Submissions: URSI Asia-Pacific Radio Science Conference (URSI AP-RASC) 2025 Andrew van der Byl
  • [casper] abstracts due february 20 - Real Time Signal Processing Systems - URSI Asia-Pacific Radio Science Conference (URSI AP-RASC) 2025 'Dan Werthimer' via casper@lists.berkeley.edu
• Re: [casper] Freezing on data acquisition with casperfpga 'David Harold Edward MacMahon' via casper@lists.berkeley.edu
• [casper] FS.com switches Jack Hickish
• [casper] 2025 CASPER workshop: September 8 - 12, ASTRON, NL Dan Werthimer
  • Re: [casper] 2025 CASPER workshop: September 8 - 12, ASTRON, NL Colm Bracken
• [casper] blocking_request( ) fails on non-standard server ports Ken Semanov
  • Re: [casper] blocking_request( ) fails on non-standard server ports Marc
  • Re: [casper] blocking_request( ) fails on non-standard server ports Ken Semanov
  • Re: [casper] blocking_request( ) fails on non-standard server ports Marc
  • Re: [casper] blocking_request( ) fails on non-standard server ports Marc
• [casper] KATCP server configuration Ken Semanov
  • [casper] Re: KATCP server configuration Ken Semanov
  • [casper] Re: KATCP server configuration Ken Semanov
  • Re: [casper] Re: KATCP server configuration Kaj Wiik
  • Re: [casper] Re: KATCP server configuration Ken Semanov
  • Re: [casper] Re: KATCP server configuration Ken Semanov
  • Re: [casper] Re: KATCP server configuration Kaj Wiik
  • Re: [casper] Re: KATCP server configuration Marc
• [casper] casperfpga Joshua Santos
  • Re: [casper] casperfpga Bishnu Kumar Sharma
  • Re: [casper] casperfpga Sam Rowe
• [casper] Model Composer / Sysgen in Docker? Jenny Smith
  • Re: [casper] Model Composer / Sysgen in Docker? Mitch Burnett
• Re: [casper] CASPER RFSoC tutorial -- compiling error, no ports, etc Kaj Wiik
  • Re: [casper] CASPER RFSoC tutorial -- compiling error, no ports, etc Liju Philip
  • Re: [casper] CASPER RFSoC tutorial -- compiling error, no ports, etc Kaj Wiik
  • Re: [casper] CASPER RFSoC tutorial -- compiling error, no ports, etc Liju Philip
• Re: [casper] RFSoC ZCU208 casperfpga connection issue Mitch Burnett
  • Re: [casper] RFSoC ZCU208 casperfpga connection issue Liju Philip
• [casper] Set static IP on RFSoC4x2 Jose Vargas
  • Re: [casper] Set static IP on RFSoC4x2 Mitchell Burnett
  • Re: [casper] Set static IP on RFSoC4x2 Liju Philip
• [casper] Installing casperfpga issue with progsa Heystek Grobler
  • Re: [casper] Installing casperfpga issue with progsa Morag Brown
  • Re: [casper] Installing casperfpga issue with progsa Heystek Grobler
  • Re: [casper] Installing casperfpga issue with progsa Kaj Wiik
• [casper] MIT Haystack FPGA Opertunity John Swoboda
• [casper] Temp FPGA Development Project John Swoboda
  • RE: [casper] Temp FPGA Development Project {External} Matthew Schiller
  • Re: [casper] Temp FPGA Development Project {External} Clifford van Dyk
• [casper] 100 GbE Hardware recommendation Mayukh Bagchi
  • Re: [casper] 100 GbE Hardware recommendation 'Dan Werthimer' via casper@lists.berkeley.edu
  • Re: [casper] 100 GbE Hardware recommendation Mayukh Bagchi
  • Re: [casper] 100 GbE Hardware recommendation Gerrit Grutzeck
  • Re: [casper] 100 GbE Hardware recommendation Muhammad Ali Akhtar
  • Re: [casper] 100 GbE Hardware recommendation 'Dan Werthimer' via casper@lists.berkeley.edu
  • Re: [casper] 100 GbE Hardware recommendation 'Dan Werthimer' via casper@lists.berkeley.edu
  • Re: [casper] 100 GbE Hardware recommendation Mayukh Bagchi
• [casper] Jasper freezing on compile Ken Semanov
  • [casper] Re: Jasper freezing on compile Ken Semanov
  • [casper] Re: Jasper freezing on compile Ken Semanov
  • Re: [casper] Jasper freezing on compile Mitchell Burnett
  • Re: [casper] Jasper freezing on compile Morag Brown
  • Re: [casper] Jasper freezing on compile Ken Semanov
  • [casper] Re: Jasper freezing on compile Rodrigo Rodríguez
  • Re: [casper] Re: Jasper freezing on compile John Ford
  • Re: [casper] Re: Jasper freezing on compile Ken Semanov
  • Re: [casper] Re: Jasper freezing on compile Ken Semanov
• [casper] KATADC boards 'Gary, Dale E' via casper@lists.berkeley.edu
• [casper] Low cost phase noise analysis Karl Warnick
  • Re: [casper] Low cost phase noise analysis G Jones
  • RE: [casper] Low cost phase noise analysis salmon.na via casper@lists.berkeley.edu
  • RE: [EXTERNAL] [casper] Low cost phase noise analysis 'Hawkins, David W (US 334B)' via casper@lists.berkeley.edu
  • Re: [casper] Low cost phase noise analysis Karl Warnick
  • RE: [casper] Low cost phase noise analysis salmon.na via casper@lists.berkeley.edu
  • Re: [casper] Low cost phase noise analysis Kaj Wiik
  • Re: [EXTERNAL] [casper] Low cost phase noise analysis Karl Warnick
  • RE: [EXTERNAL] [casper] Low cost phase noise analysis 'Hawkins, David W (US 334B)' via casper@lists.berkeley.edu
  • Re: [EXTERNAL] [casper] Low cost phase noise analysis Karl Warnick
  • Re: [casper] Low cost phase noise analysis Daniel Blakley
  • RE: [casper] Low cost phase noise analysis salmon.na via casper@lists.berkeley.edu
  • Re: [casper] Low cost phase noise analysis Michael Inggs
  • Re: [casper] Low cost phase noise analysis Karl Warnick
  • Re: [casper] Low cost phase noise analysis 'salmon.na' via casper@lists.berkeley.edu
• [casper] Using Docker to make RFSoC installation easier 'Beerentemfel, Jasper' via casper@lists.berkeley.edu
  • Re: [casper] Using Docker to make RFSoC installation easier Matthew Schiller
  • Re: [casper] Using Docker to make RFSoC installation easier Kaj Wiik
• [casper] BINGO radiotelescope - Skarab ADC configuration and synchronization issues Rafael Alves
  • Re: [casper] BINGO radiotelescope - Skarab ADC configuration and synchronization issues Andrew Martens
• [casper] Unable to save modified .slx file Talon Myburgh
  • Re: [casper] Unable to save modified .slx file Jack Hickish
  • Re: [casper] Unable to save modified .slx file 'David Harold Edward MacMahon' via casper@lists.berkeley.edu
• [casper] Seeking [preferably UK] FPGA/DSP person! Jack Hickish
• [casper] SKARAB replacement kobe...@seasystems-usa.com
• [casper] Next CASPER workshop Francois Kapp
  • Re: [casper] Next CASPER workshop 'Ross Martin' via casper@lists.berkeley.edu
  • Re: [casper] Next CASPER workshop Francois Kapp
• Re: [casper] How could this DRAM fetch be made faster? {External} Ken Semanov
  • Re: [casper] How could this DRAM fetch be made faster? {External} Ken Semanov
  • Re: [casper] How could this DRAM fetch be made faster? {External} Matthew Schiller
• [casper] pfb_coeff_gen_calc shifted sinc arguments Nathan West
  • Re: [casper] pfb_coeff_gen_calc shifted sinc arguments Andrew Martens
  • Re: [casper] pfb_coeff_gen_calc shifted sinc arguments Nathan West
  • Re: [casper] pfb_coeff_gen_calc shifted sinc arguments Jack Hickish
  • Re: [casper] pfb_coeff_gen_calc shifted sinc arguments Nathan West
• [casper] Adding new HW support for Red Pitaya SDRLab Will Taylor
  • Re: [casper] Adding new HW support for Red Pitaya SDRLab Jack Hickish
  • Re: [casper] Adding new HW support for Red Pitaya SDRLab Will Taylor
• [casper] NEWSDR 2024 Event Registration John Swoboda
• [casper] Regarding 32 channel ADC channel calibration in ROACH2 Sivakumar Sivasankar
  • Re: [casper] Regarding 32 channel ADC channel calibration in ROACH2 'Dan Werthimer' via casper@lists.berkeley.edu
  • Re: [casper] Regarding 32 channel ADC channel calibration in ROACH2 Sivakumar Sivasankar
  • Re: [casper] Regarding 32 channel ADC channel calibration in ROACH2 'Dan Werthimer' via casper@lists.berkeley.edu
  • Re: [casper] Regarding 32 channel ADC channel calibration in ROACH2 Sivakumar Sivasankar
• [casper] Question about using DRAM for ADC Data Storage on RFSoC Yunfan ZHANG
  • Re: [casper] Question about using DRAM for ADC Data Storage on RFSoC Mitchell Burnett
• [casper] MATLAB startsg startup Warning "Unable to resolve the name py.sys.path." Ken Semanov
  • [casper] Re: MATLAB startsg startup Warning "Unable to resolve the name py.sys.path." Ken Semanov
• [casper] General GPIO Kaj Wiik
  • Re: [casper] General GPIO Jack Hickish
  • Re: [casper] General GPIO Kaj Wiik
• Re: [casper] ZCU 208 PPS Input Mitch Burnett
  • Re: [casper] ZCU 208 PPS Input John Swoboda
  • Re: [casper] ZCU 208 PPS Input Mitch Burnett
  • Re: [casper] ZCU 208 PPS Input John Swoboda
  • Re: [casper] ZCU 208 PPS Input Mitch Burnett
• [casper] VDIF Packetizer Mayukh Bagchi
  • Re: [casper] VDIF Packetizer Kaj Wiik
  • Re: [casper] VDIF Packetizer Matthew Schiller
  • Re: [casper] VDIF Packetizer Wael Farah
• [casper] PhD Opportunity in GPU/DSP Andrew Jameson
• [casper] ClockConstraint arguments order Ken Semanov
  • Re: [casper] ClockConstraint arguments order Bopage Kumarasiri
• [casper] NEWSDR 2024 John Swoboda
• [casper] SETI Institute Posdoc Scholarships Jack Hickish
• [casper][roach2] pfb blocks doesn't allow to change parameters Umesha Kumarasiri
• Re: [casper] Problem with 10 GbE communication in ROACH-2 Jack Hickish
  • Re: [casper] Problem with 10 GbE communication in ROACH-2 Sivakumar Sivasankar
  • Re: [casper] Problem with 10 GbE communication in ROACH-2 Jack Hickish
  • Re: [casper] Problem with 10 GbE communication in ROACH-2 Jack Hickish
• [casper] DSP Engineer opening at Thai National Radio Observatory Spiro Sarris
• [casper] AD9082 JESD204C oneshot_sync Jack Hickish
  • [casper] Re: AD9082 JESD204C oneshot_sync Jack Hickish
• Re: [casper] Question about the RFSoC Clock Configuration Mitchell Burnett
  • Re: [casper] Question about the RFSoC Clock Configuration Mitchell Burnett
  • 回复: [casper] Question about the RFSoC Clock Configuration Yunfan Zhang
• Re: [casper] Connection Problem on RFSoC 4*2 Board Mitchell Burnett
• [casper] Fault LED is switched on when I start the Roach2 Sivakumar Sivasankar
  • Re: [casper] Fault LED is switched on when I start the Roach2 'David Harold Edward MacMahon' via casper@lists.berkeley.edu
  • Re: [casper] Fault LED is switched on when I start the Roach2 Sivakumar Sivasankar
• [casper] ROACH2 Recovering using Xilinx JTAG cable Alikhan Talipbayev
• [casper] Connecting issues with Roach2 from Corr Sivakumar Sivasankar

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