This should be fixed in the repository now. Let me know if you continue to
have issues with it.

Thanks,
Henry

G Jones wrote:
Henry,
I think I've tracked this bug down to @xps_plb2opb/gen_mhs_ip.m, these lines:
opb_name = blk_obj.opb_name;
opb_addr_start = blk_obj.opb_addr_start;
addr_size = blk_obj.addr_size;
opb_clk = blk_obj.opb_clk;
plb_clk = blk_obj.plb_clk;

if isempty(opb_clk)
    opb_clk = 'sys_clk';
end

if isempty(plb_clk)
    plb_clk = 'sys_clk';
end

blk_obj in this case definitely has no opb_clk or plb_clk attributes. Is it supposed to? It seems like there should be a try catch block around the attempts to access these members. I don't understand why this only shows up in more complicated designs, is it because the plb_opb bridge is only instantiated if there are several shared brams or registers? I notice that these offending lines are new to the 10.1 version of things; they are absent from the 7.1 version. Perhaps this is something to do with ROACH? I'm going to work around this way for now, but let me know if there is something else going on before I commit a change.
Thanks,
Glenn

On Thu, Sep 4, 2008 at 4:34 PM, G Jones <[email protected] <mailto:[email protected]>> wrote:

    I just came across bug #3 below. Has anyone managed to figure this
    one out or have any clue where to start looking? I'm compiling an
    iBOB design. My error message is identical.
    Glenn

    On Fri, Aug 22, 2008 at 2:15 PM, Laura Spitler
    <[email protected] <mailto:[email protected]>> wrote:

        Hi everyone,
        In the last couple of days I've discovered a couple bugs while
        working with the 10.1 tools. Is there a 10.1 bug reporting list
        set up or would there be any interest? That way people using 7.1
        aren't bothered.

        Cheers,
        Laura
        3) Compling a slightly more complicated design to the BEE2
        yielded the error below. I couldn't track down exactly what was
        causing the error. It did not depend on clock type.

        ---------------------------------
        Problem with block :
        ==============================================================
         Simulink Name: PLB to OPB bridge added at 0xD1000000
         Parent System:
         Block type: xps_plb2opb
         hw_sys = any
         opb_name = opb1
         opb_addr_start = 3506438144
         addr_size = 16777216
        ==============================================================
        Reference to non-existent field 'opb_clk'.
        Error using ==> gen_xps_files at 512
        Error found during Peripheral generation in MHS (gen_mhs_ip).

        --------------------------------------

        (P. S. - For Berkeley people, I localized this to Mark and my TVG)




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