As Andrew mentioned, I tried to do this with a design at the ATA. I spent 3 or 4 days on it, and seemingly had a working solution, but even though the clock looked okay on an oscilloscope, the board behaved as if it was occasionally missing some clock cycles. I was in a rush to deploy the instrument, so I ended up just using an iADC card purely to clock the board, which is a rather large waste.
Peter -----Original Message----- From: [email protected] [mailto:[email protected]] On Behalf Of Andrew Siemion Sent: Thursday, July 09, 2009 5:43 AM To: Randy McCullough; [email protected]; [email protected] Subject: Re: [casper] Alternate Clock Source(s) for iBOBs? Hi Randy, Peter McMahon spent some time trying to get this working with the ata pulsar machine, and as I recall it proved to be a little flakey. I can dig up his design and send it over for you to take a look though. -andrew ------Original Message------ From: Randy McCullough Sender: [email protected] To: [email protected] Subject: [casper] Alternate Clock Source(s) for iBOBs? Sent: Jul 9, 2009 5:38 AM Hi Everyone, Is it possible to use an iBOB's front panel SMA connector as its logic clock input source? Within the MSSGE mask, once the iBOB platform has been selected, the other pull-down selections seem to imply that this is possible. In fact, a simple LED blinker design which is set up to use an SMA input as the logic clock source builds without errors, but will not function once loaded into the FPGA. Thanks, Randy sent from a mobile device
