Great news! It might have been caused by the updated uboot. It would be interesting to see if the old uboot works with the old dimm(it would be great if you could check this). I did notice that you were using a dual-rank 1GB dimm, while we are using single rank 512MB dimms here. Glad you came right. Cheers, David > Dear David > > You are right. > I change another DDRII ram, it works!!! > Before this ROACH was broken, this DDRII is OK... > After all, thanks for your help very much. > > Regards A-Hsin > > ----- Original Message ----- From: "David George" > <[email protected]> > To: "C-H Cheng" <[email protected]> > Sent: Thursday, September 17, 2009 6:12 PM > Subject: Re: [casper] PowerPC U-Boot Configuration > > >> It fails before flash initialization, so it is likely a ddr2 problem. >> Try another ddr2 dimm, registered is fine, any size and any speed. >> I'll try to see what could go wrong... >>> Hi David >>> >>> After trying the debug.bin file, I get some message:(also I config to >>> CONFIG C in SW3) >>> --------------------------------------------------------------------------------------------- >>> >>> >>> U-Boot 2008.10-svn2009 (Jun 23 2009 - 15:08:44) >>> >>> CPU: AMCC PowerPC 440EPx Rev. A at 528 MHz (PLB=132, OPB=66, EBC=66 >>> MHz) >>> No Security/Kasumi support >>> Bootstrap Option C - Boot ROM Location EBC (16 bits) >>> 32 kB I-Cache 32 kB D-Cache >>> Board: Roach >>> I2C: ready >>> DTT: 1 is 27 C >>> DRAM: (spd v1.2) 1 GB >>> ok705ffe44 >>> >>> >>> U-Boot 2008.10-svn2322 (Sep 17 2009 - 11:08:33) >>> >>> CPU: AMCC PowerPC 440EPx Rev. A at 528 MHz (PLB=132, OPB=66, EBC=66 >>> MHz) >>> No Security/Kasumi support >>> Bootstrap Option C - Boot ROM Location EBC (16 bits) >>> 32 kB I-Cache 32 kB D-Cache >>> Board: Roach >>> I2C: ready >>> DTT: 1 is 28 C >>> DRAM: dram: about to probe chip 0x50 >>> (spd v1.2) dram: raw >>> 80 08 08 0e 0a 61 40 00 05 30 45 00 82 08 00 00 >>> 0c 04 38 01 02 00 03 3d 50 50 60 3c 1e 3c 2d 80 >>> 20 27 10 17 3c 1e 1e 00 00 3c 69 80 18 22 00 00 >>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 72 >>> dram: ddr2 memory >>> dram: bus speed 132000002Hz >>> dram: refresh rate 7812500ps >>> dram: 0x2 = 0x00000000 >>> dram: controller caps 0x020c0e00 >>> dram: 0x0 = 0x0000190a >>> dram: 0x1 = 0x01000000 >>> dram: burst length caps=0xc, chosen=4 >>> dram: latency choices 0x38 >>> dram: can do cl=5 >>> dram minclock: 45...@132000002hz -> 0 >>> dram: can do cl=4 >>> dram minclock: 50...@132000002hz -> 0 >>> dram: can do cl=3 >>> dram minclock: 60...@132000002hz -> 0 >>> dram: selected cas=3, X-2 >>> dram: 0x3 = 0x02030602 >>> dram trc: 6000...@132000002hz -> 7 >>> dram trrd: 750...@132000002hz -> 0 >>> dram trtp: 750...@132000002hz -> 0 >>> dram: 0x4 = 0x08010100 >>> dram trp: 1500...@132000002hz -> 1 >>> dram tras: 4500...@132000002hz -> 5 >>> dram: 0x5 = 0x02020206 >>> dram twtr: 750...@132000002hz -> 0 >>> dram trfc: 10500...@132000002hz -> 13 >>> dram: 0x6 = 0x0101c80e >>> dram: 0x7 = 0x000d0101 >>> dram: 0x8 = 0x02c80001 >>> dram: 0x9 = 0x00011d5f >>> dram: 2 ranks >>> dram: 0xa = 0x00000300 >>> dram: each rank 512Mb >>> dram txsnr: 11500...@132000002hz -> 15 >>> dram: 0xb = 0x0010c800 >>> dram: tckmax is 8000ps, arb tcke set to 3 >>> dram: 0xc = 0x00000003 >>> dram: memory is probably unbuffered >>> dram: 0xe = 0x00000000 >>> dram: 0x11 = 0x19000000 >>> dram: 0x12 = 0x19191919 >>> dram: 0x13 = 0x19191919 >>> dram: 0x14 = 0x0b0b0b0b >>> dram: 0x15 = 0x0b0b0b0b >>> dram: 0x16 = 0x00267f0b >>> dram: 0x17 = 0x00000000 >>> dram: 0x18 = 0x01010002 >>> dram tref: 781250...@132000002hz -> 1031 >>> dram: 0x1a = 0x5b260408 >>> dram: 0x1b = 0x0800682b >>> dram: 0x1c = 0x00000000 >>> dram: 0x1f = 0x00000000 >>> dram: got 14 row addresses, limit 14 >>> dram: 0x2a = 0x00000006 >>> dram: have 4 banks >>> dram: got 10 column addresses, limit 12 >>> dram twr: 1500...@132000002hz -> 1 >>> dram: 0x2b = 0x020a0200 >>> dram trcd: 1500...@132000002hz -> 1 >>> dram: 0x2c = 0x00000002 >>> dram: making memory go >>> dram: 0x2 = 0x00000001 >>> dram: reg 0 after lock: 0x00c0190a >>> dram: reg 1 after lock: 0x01000000 >>> DQS calibration - Window detected: >>> max_passing_cases = 39 >>> wr_dqs_shift = 95 >>> dll_dqs_delay_X = 23 >>> dll_dqs_delay_X window = 4 - 42 >>> DDR0_09=0x00011d5f >>> DDR0_22=0x00267f0b >>> DDR0_17=0x17005200 >>> DDR0_18=0x17171717 >>> DDR0_19=0x17171717 >>> 1 GB >>> Reserving 16384k for kernel logbuffer at 3fffa000 >>> Top of RAM usable for U-Boot at: 3fffa000 >>> Reserving 668k for U-Boot at: 3ff53000 >>> Reserving 1032k for malloc() at: 3fe51000 >>> Reserving 140 Bytes for Board Info at: 3fe50f74 >>> Reserving 64 Bytes for Global Data at: 3fe50f34 >>> Stack Pointer at: 3fe50f18 >>> New Stack Pointer is: 3fe50f18 >>> ---------------------------------------------------------------------- >>> Any idea? >>> >>> Regards A-Hsin >>> >>> >>> ----- Original Message ----- From: "David George" >>> <[email protected]> >>> To: "C-H Cheng" <[email protected]> >>> Sent: Thursday, September 17, 2009 5:47 PM >>> Subject: Re: [casper] PowerPC U-Boot Configuration >>> >>> >>>> Hi C-H (how are you normally addressed?) >>>> >>>> >>>>> Thanks David >>>>> >>>>> "* Try reinstalling uboot using the macG tool" as you said, >>>>> May I use OCD commander to program uboot? >>>>> >>>>> Regards C-H Cheng >>>>> >>>> To load the macro, I typically: >>>> open up ocd commander, select AMCC PPC440EP processor, click ok, click >>>> macro, select loadram_rinit_auto.mac, then click open. >>> >>> >> >> >> -- >> David George >> Digital Design Engineer >> Karoo Array Telescope >> Tel: +27 21 531-7282 >> Fax: +27 21 531-9761 >> Email: [email protected] >> Web: www.ska.ac.za > >
-- David George Digital Design Engineer Karoo Array Telescope Tel: +27 21 531-7282 Fax: +27 21 531-9761 Email: [email protected] Web: www.ska.ac.za
