In the block documentation regarding use of the "ten_GbE_v2" block,
there's no mention
of the requirement to clock data into the TX fifo on every other clock
cycle when running
much above 120MHz. I assume that this requirement, which was explained
in the block
documentation for the original "ten_GbE" block, applies to v2 as well.
Is this correct?
Thanks,
Randy
- [casper] Using "ten_GbE_v2" above 120MHz... Randy McCullough
-