In case anyone else comes across this problem, the cause was indeed that the DCM was set to low frequency mode, which works fine for the iBOB but not for ROACH. Henry has updated the QuADC block so that it automatically selects the correct DCM based on the clock frequency, so hopefully no one else will have this issue.
Glenn On Sun, Dec 13, 2009 at 12:13 AM, Jason Manley <[email protected]> wrote: > I haven't tried QuADC on ROACH, but I have noticed on the ibob, that there > is no check to see that there's no pin overlap between both ADCs. You can > set 'em both to ZDOK 0 and will start compile before falling-over with > cryptic (read: unrelated) error messages. > > Jason > > > On 11 Dec 2009, at 20:32, G Jones wrote: > >> Hello, >> I'm getting started using the quadADC with ROACH so I made a simple >> design to simply catch the ADC data into a snap block. I set the ADC >> clock to 200 MHz and the system clock source to adc0, also at 200 MHz. >> When I run the compilation, I get a few timing violations, all saying >> that the clock period on adc0_clk_in of 5 ns exceeds the minimum >> period limit of 8.332ns (120 Mhz) (Tdcmpc). I tried to look up Tdcmpc >> in the datasheet, but don't see it. I do see that the DCM in low >> frequency mode is limited to 120 MHz for the -1 speed grade. It looks >> like high frequency mode would work fine and get around this problem. >> Is the issue that the quadADC yellow block is not requesting the >> proper DCM settings? >> >> Thanks, >> Glenn >> > >
