Hi Jon,
I'd like to expand on one of Dan's comments a bit...
1) If the signal source you're driving from is a perfect match and
there are no other reflections, adding an attenuator won't help
reduce non-flatness. You can tolerate up to a maximum of one
reflection on a line without causing problems other than simple
mismatch loss. But even if the source is perfect, the cable itself
can contribute problems due to reflections at connectors,
structural resonances, etc. In these cases the attenuator may
also fail to provide a total cure, depending on where the various
problems originate. But given that the ADC input is a high-
reflection entity, I agree with Dan and re-stress the importance of
putting the attenuator as close as possible to the ADC board's
input, as he described.
One other thing- you aren't using a TEE connector as a splitter
anywhere in the line going to the ADC board, are you? Doing
so is almost a guarantee of flatness problems.
The "structural resonance" I mentioned above occurs if there is a
manufacturing problem with the cable causing spatially-periodic
variations of characteristic impedance. I have some cheap RG-58
cables I once bought which do pretty well up to roughly 1 GHz,
above which the "loss" rather abruptly becomes much higher in a
spectacular fashion.
Dana Whitlow (Arecibo Observatory)
Dan Werthimer wrote:
hi jon,
there are a couple of possibilities that might explain
the frequency response you are seeing:
1) the ADC2x1000-8 board has poor termination.
(the input impedance is not 50 ohms at all frequencies).
this causes reflections, which depend on cable length
and frequency. you can reduce the reflections by
placing an attenuator on the ADC input.
(use an SMA attenuator, and connect it directly
to the SMA input of the ADC).
you can also reduce low frequency resonances by using a short cable.
2) as danny pointed out,
in your tests injecting a pure sine wave, you need to make sure
the frequencies you select are always exactly centered in the
middle of the PFB/FFT spectral bins. it's best to phase lock the
signal input synthesizer to the same synth that's driving the
adc sample clock. otherwise, you are sensitive to the scalloping
(there's a 3 dB drop if you are exactly between two spectral bins).
best wishes,
dan
On 6/25/2010 6:29 AM, Jon Losh wrote:
Hi,
I'm working with a group under Professor Tegmark at MIT. We've been
messing around with the roach as a spectrometer (tutorial 3) and
we're trying to get the unit conversion from the strange power-like
units the roach spits out to dBm. I looked at the datasheet for the
ADC, and it seems like the ADC accepts inputs from [-1, 1] V and
digitizes them. We then retrieve this data off the roach, and it
seems like it's scaled, but we can't figure how.
Also, the input voltage at which the ADC clips seems to depend on
input frequency, as seen in the attached plot. To make it, for each
frequency, we ramped up the power of the input sinusoid until the ADC
clipped. I guess there might be some resonances where the input
voltage is low?
