Setting the clock pin location to d7 worked.
Thank you all who responded.
> I am sorry I didn't provide more detail. I
> have Matlab 2009a, Xilinx 11.4 (upgraded
> from 11.1) and the current CASPER library.
> An engineering graduate student used the
> same installation procedure as I used and
> ran simulations on nearly identical models
> but received no error messages. (However,
> the student is too busy to help.)
>
>> I have a new toolflow installation on Linux.
>> When I use the yellow blocks in my Simulink
>> models and run a simulation, I get the error
>> message
>>
>> "All Xilinx Blocks must be contained in a level of hierarchy with a
>> System Generator Token"
>>
>> from the DefaultBlockDiagram. All the Xilinx
>> blocks I add are in the same hierarchy level
>> with a System Generator token. What causes
>> this error message? How do I fix this?
>>
>>
>>
>>
>
>
>
