Hi All,

I am a student at UCLA designing stuff on the ROACH.

I have a question about the qdr block. According to the documentation (
http://casper.berkeley.edu/wiki/Qdr), there is supposed to be 9 cycles of
latency between the *rd_en* signal and valid data at *data_out*.
However, I am noticing that it is actually 10 cycles (i.e. if *rd_en* is
high at cycle 0, the data is available at cycle 10).
Am I interpreting the wiki wrong or using the block incorrectly, or is that
an error in the documentation?

Thanks in advance,
Yuta Toriyama
[email protected]

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