hi mandana,
where you set the ADC input level depends on the
RFI environment. it's a balance between
setting the level high enough to minimize
quantization noise, yet low enough that
the input signal doesn't saturate the ADC very often.
if you don't have much RFI,
a good level for an 8 bit ADC is 25 ADC units RMS,
assuming the ADC goes from -128 to +127.
(thus, the ADC will clip at about 5 sigma).
best wishes,
dan
On 6/9/2011 5:13 PM, Mandana Amiri wrote:
Hi all,
We have finally setup two dual-polarization antennas and we are
acquiring data using a Roach board and 2 iADC boards. We are running a
slight variation of poco design in tutorial 4, sampling at 850MHz. We
adjusted the equalizer gains for each frequency bin separately, but
the same for all 4 inputs (a, b, c, d). I realize now that one has to
monitor the overall power and re-equalize these gains to avoid
clipping. Our current plan is to find out experimentally how often we
need to re-adjust these gains.
Is there any guideline or advice on how to set these gains?
I came across the corr_eq_init.py in the corr package, but I am
missing the idea behind the equalization polynomials (or is this
because of a particular setup?).
Thanks,
Mandana
