Your experience is the same as mine: Once you turn the bit on, the phase is randomly maligned by up to about three clocks. Looks like it stays at whatever phase setting it chooses once the command is sent thogh. Makes me suspect the error is in transmission, especially since we don't have problems with this on a Nalllatech board.
You're right, turning off the bit only occasionally fixes the signal. Strange. It is interesting to note that the full range of the phase offset is 1020ps (880 coarse + 140 fine). At a 1500MHz clock, the ADC will get a sample every 333ps. 1020/333 = 3.07229 maximum delay offset. I bet random bits are being thrown (or something), causing the strange offset. We might see the noise if some of the lower bits (which are supposed to be all '1's were corrupted too. Just a theory. --Ryan Monroe ----- Original Message ----- From: "William Mallard" <[email protected]> To: "Ryan Monroe" <[email protected]> Cc: [email protected] Sent: Monday, June 20, 2011 5:14:47 PM Subject: Re: [casper] Roach ADC interleave problem? Ryan Monroe wrote: > I'm trying to interleave two 3GSPS iADCs (083000s). While I have the > gain and offset working properly, whenever I try and adjust the phase, > ADC1 starts going haywire (random phase offset, noise occasionally > added to signal, etc). Subsequently turning off the phase adjust bit > in the coarse phase register stops the chaos. Does turning off the phase adjust bit always fix the signal? It's been my experience that toggling the bit throws the even and odd samples out of phase randomly and by up to 3 clock cycles. I eventually gave up and resigned myself to using tunable analog delays (which is suboptimal).
