Hi Dave, I have modified the BRAM block to only use EDK bram if the datawidth is set to 32 and the options to register the outputs are set to false. In all other cases the custom bram block is used.
Regards Wes On Tue, Mar 12, 2013 at 8:35 PM, David MacMahon <dav...@astro.berkeley.edu>wrote: > I've not tried that far back. I go back and forth between 13.x and 14.x > tools. > > I have not yet backported your shared bram changes yet. I very much like > the concept and think that it should probably be used even for shared brams > that have data width of 32 so that we can use the BRAM output register > option. The Xilinx BRAM pcore that is currently used for data width of 32 > does not support that option, but it would greatly helps with timing (and > therefor placement) as the clock-to-out time for the UNregistered BRAM is > >2 ns! > > Dave > > On Mar 12, 2013, at 10:54 AM, Wesley New wrote: > > > That is pretty cool, thanks for the info dave. :) > > > > Have you tried building with the most recent ska-sa libraries on 11.5? > > I updated the custom shared bram block to use the latest coregen. I am > > not sure how an older version of coregen would behave. This is only > > for brams using a data width that is not 32 bits wide. > > > > On 3/12/13, David MacMahon <dav...@astro.berkeley.edu> wrote: > >> Hi, Wes, > >> > >> On Mar 12, 2013, at 10:35 AM, Wesley New wrote: > >> > >>> There > >>> might be 1 or 2 tweeks to the tools that you would have to do. > >> > >> The only "tweak" that I've needed to do so far is to export model files > >> (e.g. xps_library.mdl) that have been saved in the latest Simulink > version > >> to an older Simulink model file format. The latest version stores the > mask > >> parameters in a way that is incompatible with earlier versions. What > was > >> Mathworks thinking?! > >> > >> Dave > >> > >> > >
