Thanks Kim for the info - let me know if you get something up and running. R
On Thu, Mar 14, 2013 at 6:35 PM, Kim Guzzino <[email protected]> wrote: > Ross, > I did a little work on the 1:2 after Rurik had finished it, although I > abandoned it also. > I will check my code and see if it compiles ok for Roach 1. I do remember it > having some issue with using both ZDOKs but I'm not sure. > I will let you know in the morning. > > Kim > > > -----Original Message----- > From: [email protected] > [mailto:[email protected]] On Behalf Of Rurik A Primiani > Sent: Thursday, March 14, 2013 4:14 PM > To: Ross Williamson > Cc: casper > Subject: Re: [casper] ADC 1x5000-8 Dux 1:2 Notes > > Hi Ross, > > I developed a large part of the 5GSps ADC yellow block(s) in the > sma-wideband repository using previous code kindly provided by Homin Jiang > and Kim Guzzino. Unfortunately, as Jonathan mentioned in a previous email, > we basically left the ROACH1, 1:2 DMUX yellow block behind when we realized > we weren't going to use it. In its present state it's basically broken. > > I would suggest getting it up to date by bringing in the clock-domain > crossing FIFO that was added into the other blocks. If I remember correctly > this was the last feature left when I stopped developing that particular > block. You should be able to copy the FIFO-related VHDL code and the FIFO > netlist over from the 1:1, just make sure to adjust the MPD, PAO, etc as > needed. Using the ROACH2, 1:2 block as a comparison is also a good idea. > Basically the biggest difference between the two is that the R2 version uses > a MMCM while the R1 version uses DCM/PLL. > > About the "adc1_dcm_locked" error you're receiving: this is a bug and I > guess I forgot to fix it for ROACH1. If you look at line 203 in > "system.mhs", > https://github.com/sma-wideband/mlib_devel/blob/master/xps_base/XPS_ROACH_ba > se/system.mhs#L203, > you'll notice that the conditional statement checks for the presence of > "adc0": > > #IF# (strcmp(get(b,'type'),'xps_adc5g')) && get(b,'use_adc0')# PORT > adc1_dcm_locked = adc1_dcm_locked > > This should actually read: > > #IF# (strcmp(get(b,'type'),'xps_adc5g')) && get(b,'use_adc1')# PORT > adc1_dcm_locked = adc1_dcm_locked > > If you make this change it should get rid of your error and allow you to use > just adc0 or adc1 without needing both present. If you do make this change > please feel free to issue a pull-request to sma-wideband and we'll merge it > into the repo. > > Best, > Rurik > > > On 3/14/2013 12:33 PM, Ross Williamson wrote: >> Hi All, >> >> I'm starting to look into getting the ADC 1x5000-8 DMUX 1:2 to work on >> a roach 1. I'm just posting a couple of comments here that I've >> uncovered so far - I think most of these stem from the fact that a lot >> of work has gone into developing the 1:1 demux with 2 cards for the >> sma-wideband project and ROACH-2. >> >> Notes: >> >> 1) I'm using the git repo from the sma-wideband project - If I should >> be looking elsewhere then let me know. >> 2) The 1:1 version uses the Xilinx FIFO IP core where as the 1:2 does >> not - This causes the 1:2 to not compile >> 3) If you hack to remove the FIFO ports from the system.mhs (bad idea) >> then you quickly notice that the opb_adc5g_controller has ports for >> the FIFO and also for 2 adc's - i.e. I don't think it will compile if >> you only have adc0 and not adc1 - error is "adc1_dcm_locked - port is >> driven by a sourceless connector " >> 4) I'm going to look at the ROACH-2 implementation as that might help >> a lot but I haven't got to it yet. >> >> Anyone know of a quick fix before I delve into the vhdl - different >> repo/earlier version? >> >> I know most people are pushing ahead with the 1:1 on the ROACH-2 with >> this board and so I'm happy looking into these issues but if anyone >> has some quick good ideas it would be great to hear them. >> >> Cheers >> >> Ross > > -- Ross Williamson Research Scientist - Sub-mm Group California Institute of Technology 626-395-2647 (office) 312-504-3051 (Cell)
