Hi Jason, Thanks for the info. In any case to use the higher speed connectors, are there any yellow blocks already included? I guess to supply the high speed connector with data I need to implement a FIFO. Is that right?
Thanks, Sameed On Thu, Apr 25, 2013 at 10:50 AM, Jason Manley <[email protected]> wrote: > > 1. As far as I understand, the ZDOK connectors interface with the > RocketIO transceivers on the Virtex 5 FPGA. Is that right? > > No, they interface to conventional GPIO pins. > > > 2. The RocketIO transceivers can reach much higher frequencies than the > FPGA's core clock rate. But the yellow blocks in the Casper toolset clock > the ZDOKs at the FPGA core clock rate only. So how should I proceed for > going to higher clock rates? I can provide an external clock through one of > the ZDOK connections in my application. > > For higher clock rates (RocketIO/MGT) with custom HW, you need to use > ROACH2's mezzanine connector. All of ROACH1's MGTs are routed to CX4 ports > on the rear panel. > > Jason
